home *** CD-ROM | disk | FTP | other *** search
/ Cream of the Crop 11 / Cream of the Crop 11-1.iso / windows / gtw95195.zip / STL00018.DA_ / STL00018.DA
Text File  |  1995-12-22  |  115KB  |  3,366 lines
  1. #
  2. #    $Id: stl00018.da@ 1.15 1995/12/01 02:00:19 jbrennei Stable $
  3. #
  4. #    Copyright (C) 1995, Diamond Multimedia Systems.
  5. #
  6. #    File:        stl00018.dat
  7. #
  8. #    Purpose:    This file contains the board and mode information for a
  9. #                Stealth 64 Video VRAM: S3 968, 2MB, IBM 526 220Mhz DAC.
  10. #
  11.  
  12. [Objects]
  13. Dac=ibm525.dac
  14. Cursor=ibm525.cur
  15. PixClk=ibm525.clk
  16. Draweng=s3x68.drw
  17.  
  18. [BoardInfo]
  19. bViewports=1
  20. bNewMMIO=1
  21. bTwoPtLine=1
  22.  
  23. [Desktops]
  24. 2048,768,8
  25. 1600,1200,8
  26. 1280,1024,8
  27. 1152,864,16
  28. 1152,864,8
  29. 1024,1536,8
  30. 1024,768,16
  31. 1024,768,8
  32. 800,600,32
  33. 800,600,24
  34. 800,600,16
  35. 800,600,8
  36. 640,480,32
  37. 640,480,24
  38. 640,480,16
  39. 640,480,8
  40.  
  41. [Viewports]
  42. 1600,1200,8,95,76
  43. 1600,1200,8,94,75
  44. 1600,1200,8,82,66
  45. 1600,1200,8,75,60
  46. 1280,1024,8,95,90
  47. 1280,1024,8,79,75
  48. 1280,1024,8,76,72
  49. 1280,1024,8,64,60
  50. 1152,864,16,82,90
  51. 1152,864,16,71,75
  52. 1152,864,16,64,70
  53. 1152,864,16,56,60
  54. 1152,864,8,82,90
  55. 1152,864,8,71,75
  56. 1152,864,8,64,70
  57. 1152,864,8,56,60
  58. 1024,768,16,96,120
  59. 1024,768,16,81,100
  60. 1024,768,16,64,80
  61. 1024,768,16,60,75
  62. 1024,768,16,58,72
  63. 1024,768,16,56,70
  64. 1024,768,16,48,60
  65. 1024,768,8,96,120
  66. 1024,768,8,81,100
  67. 1024,768,8,64,80
  68. 1024,768,8,60,75
  69. 1024,768,8,58,72
  70. 1024,768,8,56,70
  71. 1024,768,8,48,60
  72. 800,600,32,75,120
  73. 800,600,32,64,100
  74. 800,600,32,56,90
  75. 800,600,32,46,75
  76. 800,600,32,48,72
  77. 800,600,32,37,60
  78. 800,600,32,35,56
  79. 800,600,24,75,120
  80. 800,600,24,64,100
  81. 800,600,24,56,90
  82. 800,600,24,46,75
  83. 800,600,24,48,72
  84. 800,600,24,37,60
  85. 800,600,24,35,56
  86. 800,600,16,75,120
  87. 800,600,16,64,100
  88. 800,600,16,56,90
  89. 800,600,16,46,75
  90. 800,600,16,48,72
  91. 800,600,16,37,60
  92. 800,600,16,35,56
  93. 800,600,8,75,120
  94. 800,600,8,64,100
  95. 800,600,8,56,90
  96. 800,600,8,46,75
  97. 800,600,8,48,72
  98. 800,600,8,37,60
  99. 800,600,8,35,56
  100. 640,480,32,64,120
  101. 640,480,32,52,100
  102. 640,480,32,48,90
  103. 640,480,32,37,75
  104. 640,480,32,37,72
  105. 640,480,32,31,60
  106. 640,480,24,64,120
  107. 640,480,24,52,100
  108. 640,480,24,48,90
  109. 640,480,24,37,75
  110. 640,480,24,37,72
  111. 640,480,24,31,60
  112. 640,480,16,64,120
  113. 640,480,16,52,100
  114. 640,480,16,48,90
  115. 640,480,16,37,75
  116. 640,480,16,37,72
  117. 640,480,16,31,60
  118. 640,480,8,64,120
  119. 640,480,8,52,100
  120. 640,480,8,48,90
  121. 640,480,8,37,75
  122. 640,480,8,37,72
  123. 640,480,8,31,60
  124.  
  125. [TextMode]
  126. CRT, RUN, EXTENDED_BIOS_FLAGS_2, 1
  127. SHELL, I10, 0x0003,  0x0000
  128. CRT, RUN, REG_LOCK_1, 0x48
  129. CRT, RUN, REG_LOCK_2, 0xA0
  130.  
  131. [GraphicsEnable]
  132. CRT, RMW, LAW_CONTROL, 0xEC, 0x13
  133. CRT, RMW, EXT_MEM_CONTROL_1, 0xE4, 0x18
  134.  
  135. [GraphicsDisable]
  136. CRT, RMW, LAW_CONTROL, 0xEC, 0x00
  137. CRT, RMW, EXT_MEM_CONTROL_1, 0xE4, 0x00
  138.  
  139. [2048,768,8]
  140. # Setting Line Pitch
  141. CRT,RUN,LOGICAL_LINE_LENGTH,0x00
  142. CRT,RUN,EXT_MODE,0x00
  143. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  144. # Setting Engine Pitch
  145. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x00
  146. CRT,RUN,MEM_CONFIG,0x8f
  147. # Setting Basic Mode Registers.The registers
  148. # below are neither Desktop or Viewport Regs
  149. # Unlock Sequencer
  150. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  151. # Dump Sequencer Registers
  152. SEQ,RUN,CLOCKING_MODE,0x01,0x0f,0x00,0x0e,0x00
  153. # Dump Graphics Controller Registers
  154. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  155. # Dump Attribute Controller Registers
  156. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  157. # Lock Sequencer
  158. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  159. DAC_IDR, RUN, DAC_OPERATION, 0x02
  160. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  161. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  162. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  163. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  164. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  165. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  166. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  167. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  168. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  169.  
  170. [1024,1536,8]
  171. # Setting Line Pitch
  172. CRT,RUN,LOGICAL_LINE_LENGTH,0x80
  173. CRT,RUN,EXT_MODE,0x00
  174. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  175. # Setting Engine Pitch
  176. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x00
  177. CRT,RUN,MEM_CONFIG,0x09
  178. # Setting Basic Mode Registers.The registers
  179. # below are neither Desktop or Viewport Regs
  180. # Unlock Sequencer
  181. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  182. # Dump Sequencer Registers
  183. SEQ,RUN,CLOCKING_MODE,0x01,0x0f,0x00,0x0e,0x00
  184. # Dump Graphics Controller Registers
  185. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  186. # Dump Attribute Controller Registers
  187. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  188. # Lock Sequencer
  189. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  190. DAC_IDR, RUN, DAC_OPERATION, 0x02
  191. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  192. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  193. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  194. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  195. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  196. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  197. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  198. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  199. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  200.  
  201. [1600,1200,8]
  202. # Setting Line Pitch
  203. CRT,RUN,LOGICAL_LINE_LENGTH,0xc8
  204. CRT,RUN,EXT_MODE,0x00
  205. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  206. # Setting Engine Pitch
  207. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x81
  208. CRT,RUN,MEM_CONFIG,0x8b
  209. # Setting Basic Mode Registers.The registers
  210. # below are neither Desktop or Viewport Regs
  211. # Unlock Sequencer
  212. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  213. # Dump Sequencer Registers
  214. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  215. # Dump Graphics Controller Registers
  216. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  217. # Dump Attribute Controller Registers
  218. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  219. # Lock Sequencer
  220. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  221. DAC_IDR, RUN, DAC_OPERATION, 0x02
  222. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  223. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  224. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  225. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  226. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  227. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  228. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  229. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  230. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  231.  
  232. [1280,1024,8]
  233. # Setting Line Pitch
  234. CRT,RUN,LOGICAL_LINE_LENGTH,0xa0
  235. CRT,RUN,EXT_MODE,0x00
  236. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  237. # Setting Engine Pitch
  238. CRT,RUN,EXT_SYSTEM_CONTROL_1,0xc0
  239. CRT,RUN,MEM_CONFIG,0x0b
  240. # Setting Basic Mode Registers.The registers
  241. # below are neither Desktop or Viewport Regs
  242. # Unlock Sequencer
  243. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  244. # Dump Sequencer Registers
  245. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  246. # Dump Graphics Controller Registers
  247. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  248. # Dump Attribute Controller Registers
  249. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  250. # Lock Sequencer
  251. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  252. DAC_IDR, RUN, DAC_OPERATION, 0x02
  253. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  254. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  255. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  256. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  257. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  258. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  259. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  260. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  261. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  262.  
  263. [1152,864,16]
  264. # Setting Line Pitch
  265. CRT,RUN,LOGICAL_LINE_LENGTH,0x20
  266. CRT,RUN,EXT_MODE,0x00
  267. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  268. # Setting Engine Pitch
  269. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x11
  270. CRT,RUN,MEM_CONFIG,0x89
  271. # Setting Basic Mode Registers.The registers
  272. # below are neither Desktop or Viewport Regs
  273. # Unlock Sequencer
  274. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  275. # Dump Sequencer Registers
  276. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  277. # Dump Graphics Controller Registers
  278. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  279. # Dump Attribute Controller Registers
  280. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  281. # Lock Sequencer
  282. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  283. DAC_IDR, RUN, DAC_OPERATION, 0x02
  284. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  285. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  286. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  287. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  288. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  289. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  290. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  291. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  292. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  293.  
  294. [1152,864,8]
  295. # Setting Line Pitch
  296. CRT,RUN,LOGICAL_LINE_LENGTH,0x90
  297. CRT,RUN,EXT_MODE,0x00
  298. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  299. # Setting Engine Pitch
  300. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x01
  301. CRT,RUN,MEM_CONFIG,0x89
  302. # Setting Basic Mode Registers.The registers
  303. # below are neither Desktop or Viewport Regs
  304. # Unlock Sequencer
  305. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  306. # Dump Sequencer Registers
  307. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  308. # Dump Graphics Controller Registers
  309. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  310. # Dump Attribute Controller Registers
  311. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  312. # Lock Sequencer
  313. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  314. DAC_IDR, RUN, DAC_OPERATION, 0x02
  315. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  316. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  317. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  318. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  319. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  320. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  321. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  322. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  323. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  324.  
  325. [1024,768,16]
  326. # Setting Line Pitch
  327. CRT,RUN,LOGICAL_LINE_LENGTH,0x00
  328. CRT,RUN,EXT_MODE,0x00
  329. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  330. # Setting Engine Pitch
  331. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x10
  332. CRT,RUN,MEM_CONFIG,0x89
  333. # Setting Basic Mode Registers.The registers
  334. # below are neither Desktop or Viewport Regs
  335. # Unlock Sequencer
  336. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  337. # Dump Sequencer Registers
  338. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  339. # Dump Graphics Controller Registers
  340. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  341. # Dump Attribute Controller Registers
  342. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  343. # Lock Sequencer
  344. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  345. DAC_IDR, RUN, DAC_OPERATION, 0x02
  346. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  347. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  348. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  349. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  350. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  351. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  352. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  353. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  354. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  355.  
  356. [1024,768,8]
  357. # Setting Line Pitch
  358. CRT,RUN,LOGICAL_LINE_LENGTH,0x80
  359. CRT,RUN,EXT_MODE,0x00
  360. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  361. # Setting Engine Pitch
  362. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x00
  363. CRT,RUN,MEM_CONFIG,0x09
  364. # Setting Basic Mode Registers.The registers
  365. # below are neither Desktop or Viewport Regs
  366. # Unlock Sequencer
  367. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  368. # Dump Sequencer Registers
  369. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  370. # Dump Graphics Controller Registers
  371. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  372. # Dump Attribute Controller Registers
  373. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  374. # Lock Sequencer
  375. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  376. DAC_IDR, RUN, DAC_OPERATION, 0x02
  377. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  378. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  379. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  380. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  381. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  382. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  383. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  384. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  385. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  386.  
  387. [800,600,32]
  388. # Setting Line Pitch
  389. CRT,RUN,LOGICAL_LINE_LENGTH,0x90
  390. CRT,RUN,EXT_MODE,0x00
  391. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  392. # Setting Engine Pitch
  393. CRT,RUN,EXT_SYSTEM_CONTROL_1,0xb0
  394. CRT,RUN,MEM_CONFIG,0x89
  395. # Setting Basic Mode Registers.The registers
  396. # below are neither Desktop or Viewport Regs
  397. # Unlock Sequencer
  398. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  399. # Dump Sequencer Registers
  400. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  401. # Dump Graphics Controller Registers
  402. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  403. # Dump Attribute Controller Registers
  404. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  405. # Lock Sequencer
  406. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  407. DAC_IDR, RUN, DAC_OPERATION, 0x02
  408. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  409. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  410. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  411. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  412. DAC_IDR, RUN, PIXEL_FORMAT, 0x06
  413. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  414. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  415. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  416. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  417.  
  418. [800,600,24]
  419. # Setting Line Pitch
  420. CRT,RUN,LOGICAL_LINE_LENGTH,0x2c
  421. CRT,RUN,EXT_MODE,0x00
  422. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  423. # Setting Engine Pitch
  424. CRT,RUN,EXT_SYSTEM_CONTROL_1,0xa0
  425. CRT,RUN,MEM_CONFIG,0x8b
  426. # Setting Basic Mode Registers.The registers
  427. # below are neither Desktop or Viewport Regs
  428. # Unlock Sequencer
  429. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  430. # Dump Sequencer Registers
  431. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  432. # Dump Graphics Controller Registers
  433. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  434. # Dump Attribute Controller Registers
  435. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  436. # Lock Sequencer
  437. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  438. DAC_IDR, RUN, DAC_OPERATION, 0x02
  439. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  440. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  441. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  442. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  443. DAC_IDR, RUN, PIXEL_FORMAT, 0x05
  444. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  445. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0x00
  446. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x01
  447. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x00
  448.  
  449. [800,600,16]
  450. # Setting Line Pitch
  451. CRT,RUN,LOGICAL_LINE_LENGTH,0xc8
  452. CRT,RUN,EXT_MODE,0x00
  453. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  454. # Setting Engine Pitch
  455. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x90
  456. CRT,RUN,MEM_CONFIG,0x89
  457. # Setting Basic Mode Registers.The registers
  458. # below are neither Desktop or Viewport Regs
  459. # Unlock Sequencer
  460. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  461. # Dump Sequencer Registers
  462. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  463. # Dump Graphics Controller Registers
  464. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  465. # Dump Attribute Controller Registers
  466. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  467. # Lock Sequencer
  468. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  469. DAC_IDR, RUN, DAC_OPERATION, 0x02
  470. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  471. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  472. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  473. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  474. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  475. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  476. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  477. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  478. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  479.  
  480. [800,600,8]
  481. # Setting Line Pitch
  482. CRT,RUN,LOGICAL_LINE_LENGTH,0x64
  483. CRT,RUN,EXT_MODE,0x00
  484. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  485. # Setting Engine Pitch
  486. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x80
  487. CRT,RUN,MEM_CONFIG,0x89
  488. # Setting Basic Mode Registers.The registers
  489. # below are neither Desktop or Viewport Regs
  490. # Unlock Sequencer
  491. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  492. # Dump Sequencer Registers
  493. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  494. # Dump Graphics Controller Registers
  495. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  496. # Dump Attribute Controller Registers
  497. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  498. # Lock Sequencer
  499. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  500. DAC_IDR, RUN, DAC_OPERATION, 0x02
  501. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  502. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  503. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  504. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  505. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  506. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  507. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  508. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  509. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  510.  
  511. [640,480,32]
  512. # Setting Line Pitch
  513. CRT,RUN,LOGICAL_LINE_LENGTH,0x40
  514. CRT,RUN,EXT_MODE,0x00
  515. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x10
  516. # Setting Engine Pitch
  517. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x70
  518. CRT,RUN,MEM_CONFIG,0x89
  519. # Setting Basic Mode Registers.The registers
  520. # below are neither Desktop or Viewport Regs
  521. # Unlock Sequencer
  522. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  523. # Dump Sequencer Registers
  524. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  525. # Dump Graphics Controller Registers
  526. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,0xff
  527. # Dump Attribute Controller Registers
  528. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,0x41,0x00,0x0f,0x00,0x00
  529. # Lock Sequencer
  530. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  531. DAC_IDR, RUN, DAC_OPERATION, 0x02
  532. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  533. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  534. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  535. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  536. DAC_IDR, RUN, PIXEL_FORMAT, 0x06
  537. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  538. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  539. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  540. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  541.  
  542. [640,480,24]
  543. # Setting Line Pitch
  544. CRT,RUN,LOGICAL_LINE_LENGTH,0xf0
  545. CRT,RUN,EXT_MODE,0x00
  546. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  547. # Setting Engine Pitch
  548. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x60
  549. CRT,RUN,MEM_CONFIG,0x8b
  550. # Setting Basic Mode Registers.The registers
  551. # below are neither Desktop or Viewport Regs
  552. # Unlock Sequencer
  553. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  554. # Dump Sequencer Registers
  555. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  556. # Dump Graphics Controller Registers
  557. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x0f,0xff
  558. # Dump Attribute Controller Registers
  559. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x14,0x07,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,0x01,0x00,0x0f,0x00,0x00
  560. # Lock Sequencer
  561. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  562. DAC_IDR, RUN, DAC_OPERATION, 0x02
  563. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  564. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  565. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  566. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  567. DAC_IDR, RUN, PIXEL_FORMAT, 0x05
  568. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  569. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0x00
  570. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x01
  571. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x00
  572.  
  573. [640,480,16]
  574. # Setting Line Pitch
  575. CRT,RUN,LOGICAL_LINE_LENGTH,0xa0
  576. CRT,RUN,EXT_MODE,0x00
  577. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  578. # Setting Engine Pitch
  579. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x50
  580. CRT,RUN,MEM_CONFIG,0x89
  581. # Setting Basic Mode Registers.The registers
  582. # below are neither Desktop or Viewport Regs
  583. # Unlock Sequencer
  584. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  585. # Dump Sequencer Registers
  586. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  587. # Dump Graphics Controller Registers
  588. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,0xff
  589. # Dump Attribute Controller Registers
  590. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,0x41,0x00,0x0f,0x00,0x00
  591. # Lock Sequencer
  592. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  593. DAC_IDR, RUN, DAC_OPERATION, 0x02
  594. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  595. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  596. DAC_IDR, RUN, MISC_CONTROL_2, 0x00
  597. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  598. DAC_IDR, RUN, PIXEL_FORMAT, 0x04
  599. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  600. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0xc2
  601. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  602. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  603.  
  604. [640,480,8]
  605. # Setting Line Pitch
  606. CRT,RUN,LOGICAL_LINE_LENGTH,0x50
  607. CRT,RUN,EXT_MODE,0x00
  608. CRT,RUN,EXT_SYSTEM_CONTROL_2,0x00
  609. # Setting Engine Pitch
  610. CRT,RUN,EXT_SYSTEM_CONTROL_1,0x40
  611. CRT,RUN,MEM_CONFIG,0x89
  612. # Setting Basic Mode Registers.The registers
  613. # below are neither Desktop or Viewport Regs
  614. # Unlock Sequencer
  615. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x06
  616. # Dump Sequencer Registers
  617. SEQ,RUN,CLOCKING_MODE,0x21,0x0f,0x00,0x0e,0x00
  618. # Dump Graphics Controller Registers
  619. GRX,RUN,SET_RESET_DATA,0x00,0x00,0x00,0x00,0x00,0x40,0x05,0x0f,0xff
  620. # Dump Attribute Controller Registers
  621. ATR,RUN,PALETTE_0,0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,0x41,0x00,0x0f,0x00,0x00
  622. # Lock Sequencer
  623. SEQ,RMW,UNLOCK_EXTENSIONS,0x00,0x00
  624. DAC_IDR, RUN, DAC_OPERATION, 0x02
  625. DAC_IDR, RUN, VRAM_MASK_LOW, 0x03
  626. DAC_IDR, RUN, MISC_CONTROL_1, 0x00
  627. DAC_IDR, RUN, MISC_CONTROL_2, 0x04
  628. DAC_IDR, RUN, MISC_CONTROL_3, 0x00
  629. DAC_IDR, RUN, PIXEL_FORMAT, 0x03
  630. DAC_IDR, RUN, PIXEL_8BPP_CONTROL, 0x00
  631. DAC_IDR, RUN, PIXEL_16BPP_CONTROL, 0x00
  632. DAC_IDR, RUN, PIXEL_24BPP_CONTROL, 0x00
  633. DAC_IDR, RUN, PIXEL_32BPP_CONTROL, 0x03
  634.  
  635. [1600,1200,8,95,76]
  636. # Unlock CRTC
  637. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  638. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  639. CRT,RUN,REG_LOCK_1,0x48,0xa5
  640. # Dump CRT Controller Registers
  641. CRT,RUN,HORZ_TOTAL,0x7d,0x64,0x62,0x00,0x67,0x10,0xe0,0x00,0x00,0x40
  642. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  643. CRT,RUN,VERT_RETRACE_START,0xb2,0x07,0xaf
  644. CRT,RUN,UNDERLINE_LOCATION,0x00,0xaf,0x00,0xa3,0xff
  645. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x10,0x00
  646. CRT,RUN,MISC_1,0x15,0x79,0x14,0x11
  647. CRT,RUN,MODE_CONTROL,0x02
  648. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  649. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  650. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  651. CRT,RUN,EXT_VERT_OVERFLOW,0x57
  652. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  653. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  654. CRT,RUN,EXT_MISC_CONTROL_3,0x02
  655. # Lock CRTC Reg 11 for compatibility
  656. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  657. # Dump ENG Register
  658. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  659. # Dump MISCOUT Register
  660. DIR,RUN,MISC_WRITE,0xef
  661. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  662. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  663. CLK_IND, RUN, FREQ_2, 0xe0
  664. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  665. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  666. CRT,RUN,LATCH_DATA, 0x08
  667.  
  668.  
  669. [1600,1200,8,94,75]
  670. # Unlock CRTC
  671. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  672. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  673. CRT,RUN,REG_LOCK_1,0x48,0xa5
  674. # Dump CRT Controller Registers
  675. CRT,RUN,HORZ_TOTAL,0x82,0x64,0x62,0x05,0x68,0x14,0xe0,0x00,0x00,0x40
  676. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  677. CRT,RUN,VERT_RETRACE_START,0xb0,0x03,0xaf
  678. CRT,RUN,UNDERLINE_LOCATION,0x00,0xaf,0x00,0xa3,0xff
  679. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x10,0x00
  680. CRT,RUN,MISC_1,0x15,0x7d,0x14,0x11
  681. CRT,RUN,MODE_CONTROL,0x02
  682. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  683. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  684. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  685. CRT,RUN,EXT_VERT_OVERFLOW,0x57
  686. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  687. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  688. CRT,RUN,EXT_MISC_CONTROL_3,0x02
  689. # Lock CRTC Reg 11 for compatibility
  690. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  691. # Dump ENG Register
  692. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  693. # Dump MISCOUT Register
  694. DIR,RUN,MISC_WRITE,0xef
  695. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  696. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  697. CLK_IND, RUN, FREQ_2, 0xe2
  698. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  699. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  700. CRT,RUN,LATCH_DATA, 0x08
  701.  
  702.  
  703. [1600,1200,8,82,66]
  704. # Unlock CRTC
  705. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  706. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  707. CRT,RUN,REG_LOCK_1,0x48,0xa5
  708. # Dump CRT Controller Registers
  709. CRT,RUN,HORZ_TOTAL,0x7d,0x64,0x62,0x00,0x67,0x11,0xe6,0x00,0x00,0x40
  710. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  711. CRT,RUN,VERT_RETRACE_START,0xaf,0x0b,0xaf
  712. CRT,RUN,UNDERLINE_LOCATION,0x00,0xaf,0x00,0xa3,0xff
  713. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x10,0x00
  714. CRT,RUN,MISC_1,0x15,0x78,0x14,0x11
  715. CRT,RUN,MODE_CONTROL,0x02
  716. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  717. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  718. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  719. CRT,RUN,EXT_VERT_OVERFLOW,0x57
  720. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  721. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  722. CRT,RUN,EXT_MISC_CONTROL_3,0x02
  723. # Lock CRTC Reg 11 for compatibility
  724. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  725. # Dump ENG Register
  726. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  727. # Dump MISCOUT Register
  728. DIR,RUN,MISC_WRITE,0xef
  729. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  730. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  731. CLK_IND, RUN, FREQ_2, 0xd3
  732. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  733. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  734. CRT,RUN,LATCH_DATA, 0x08
  735.  
  736. [1600,1200,8,75,60]
  737. # Unlock CRTC
  738. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  739. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  740. CRT,RUN,REG_LOCK_1,0x48,0xa5
  741. # Dump CRT Controller Registers
  742. CRT,RUN,HORZ_TOTAL,0x7f,0x64,0x62,0x02,0x68,0x12,0xe8,0x00,0x00,0x40
  743. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  744. CRT,RUN,VERT_RETRACE_START,0xaf,0x0b,0xaf
  745. CRT,RUN,UNDERLINE_LOCATION,0x00,0xaf,0x00,0xa3,0xff
  746. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x10,0x00
  747. CRT,RUN,MISC_1,0x15,0x77,0x14,0x11
  748. CRT,RUN,MODE_CONTROL,0x02
  749. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  750. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  751. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  752. CRT,RUN,EXT_VERT_OVERFLOW,0x57
  753. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  754. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xbe,0x00,0x00
  755. CRT,RUN,EXT_MISC_CONTROL_3,0x02
  756. # Lock CRTC Reg 11 for compatibility
  757. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  758. # Dump ENG Register
  759. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  760. # Dump MISCOUT Register
  761. DIR,RUN,MISC_WRITE,0xef
  762. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  763. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  764. CLK_IND, RUN, FREQ_2, 0xcd
  765. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  766. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  767. CRT,RUN,LATCH_DATA, 0x08
  768.  
  769. [1280,1024,8,95,90]
  770. # Unlock CRTC
  771. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  772. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  773. CRT,RUN,REG_LOCK_1,0x48,0xa5
  774. # Dump CRT Controller Registers
  775. CRT,RUN,HORZ_TOTAL,0x67,0x4f,0x50,0x8b,0x52,0x9a,0x2a,0x42,0x00,0x40
  776. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  777. CRT,RUN,VERT_RETRACE_START,0x03,0x07,0xff
  778. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x2a,0xe3,0xff
  779. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x18,0x00
  780. CRT,RUN,MISC_1,0x15,0x62,0x14,0x11
  781. CRT,RUN,MODE_CONTROL,0x02
  782. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  783. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  784. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  785. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  786. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  787. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  788. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  789. # Lock CRTC Reg 11 for compatibility
  790. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  791. # Dump ENG Register
  792. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  793. # Dump MISCOUT Register
  794. DIR,RUN,MISC_WRITE,0xef
  795. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  796. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  797. CLK_IND, RUN, FREQ_2, 0xd0
  798. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  799. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  800. CRT,RUN,LATCH_DATA, 0x08
  801.  
  802.  
  803. [1280,1024,8,79,75]
  804. # Unlock CRTC
  805. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  806. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  807. CRT,RUN,REG_LOCK_1,0x48,0xa5
  808. # Dump CRT Controller Registers
  809. CRT,RUN,HORZ_TOTAL,0x64,0x4f,0x50,0x89,0x51,0x9a,0x2c,0x42,0x00,0x40
  810. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  811. CRT,RUN,VERT_RETRACE_START,0x00,0x03,0xff
  812. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x2c,0xe3,0xff
  813. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x18,0x00
  814. CRT,RUN,MISC_1,0x15,0x5e,0x14,0x11
  815. CRT,RUN,MODE_CONTROL,0x02
  816. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  817. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  818. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  819. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  820. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  821. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  822. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  823. # Lock CRTC Reg 11 for compatibility
  824. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  825. # Dump ENG Register
  826. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  827. # Dump MISCOUT Register
  828. DIR,RUN,MISC_WRITE,0xef
  829. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  830. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  831. CLK_IND, RUN, FREQ_2, 0xc1
  832. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  833. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  834. CRT,RUN,LATCH_DATA, 0x08
  835.  
  836. [1280,1024,8,76,72]
  837. # Unlock CRTC
  838. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  839. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  840. CRT,RUN,REG_LOCK_1,0x48,0xa5
  841. # Dump CRT Controller Registers
  842. CRT,RUN,HORZ_TOTAL,0x69,0x4f,0x50,0x8c,0x53,0x98,0x27,0x42,0x00,0x40
  843. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  844. CRT,RUN,VERT_RETRACE_START,0x05,0x0c,0xff
  845. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x23,0xe3,0xff
  846. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x18,0x00
  847. CRT,RUN,MISC_1,0x15,0x62,0x14,0x11
  848. CRT,RUN,MODE_CONTROL,0x02
  849. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  850. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  851. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  852. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  853. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  854. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  855. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  856. # Lock CRTC Reg 11 for compatibility
  857. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  858. # Dump ENG Register
  859. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  860. # Dump MISCOUT Register
  861. DIR,RUN,MISC_WRITE,0xef
  862. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  863. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  864. CLK_IND, RUN, FREQ_2, 0xc1
  865. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  866. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  867. CRT,RUN,LATCH_DATA, 0x08
  868.  
  869. [1280,1024,8,64,60]
  870. # Unlock CRTC
  871. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  872. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  873. CRT,RUN,REG_LOCK_1,0x48,0xa5
  874. # Dump CRT Controller Registers
  875. CRT,RUN,HORZ_TOTAL,0x66,0x4f,0x50,0x89,0x53,0x98,0x33,0x42,0x00,0x40
  876. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  877. CRT,RUN,VERT_RETRACE_START,0x00,0x07,0xff
  878. CRT,RUN,UNDERLINE_LOCATION,0x00,0x00,0x28,0xe3,0xff
  879. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x18,0x00
  880. CRT,RUN,MISC_1,0x15,0x5f,0x14,0x11
  881. CRT,RUN,MODE_CONTROL,0x02
  882. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  883. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  884. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  885. CRT,RUN,EXT_VERT_OVERFLOW,0x55
  886. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  887. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x19,0xae,0x00,0x00
  888. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  889. # Lock CRTC Reg 11 for compatibility
  890. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  891. # Dump ENG Register
  892. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  893. # Dump MISCOUT Register
  894. DIR,RUN,MISC_WRITE,0xef
  895. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  896. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  897. CLK_IND, RUN, FREQ_2, 0xab
  898. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  899. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  900. CRT,RUN,LATCH_DATA, 0x08
  901.  
  902. [1152,864,8,82,90]
  903. # Unlock CRTC
  904. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  905. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  906. CRT,RUN,REG_LOCK_1,0x48,0xa5
  907. # Dump CRT Controller Registers
  908. CRT,RUN,HORZ_TOTAL,0x59,0x47,0x48,0x9c,0x4a,0x0e,0x95,0xff,0x00,0x60
  909. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  910. CRT,RUN,VERT_RETRACE_START,0x65,0x04,0x5f
  911. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0x99,0xeb,0xff
  912. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  913. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  914. CRT,RUN,MODE_CONTROL,0x02
  915. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  916. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  917. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  918. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  919. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  920. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  921. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  922. # Lock CRTC Reg 11 for compatibility
  923. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  924. # Dump ENG Register
  925. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  926. # Dump MISCOUT Register
  927. DIR,RUN,MISC_WRITE,0xef
  928. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  929. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  930. CLK_IND, RUN, FREQ_2, 0xb9
  931. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  932. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  933. CRT,RUN,LATCH_DATA, 0x08
  934.  
  935. [1152,864,8,71,75]
  936. # Unlock CRTC
  937. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  938. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  939. CRT,RUN,REG_LOCK_1,0x48,0xa5
  940. # Dump CRT Controller Registers
  941. CRT,RUN,HORZ_TOTAL,0x5a,0x47,0x48,0x9d,0x4b,0x0f,0xb7,0xff,0x00,0x60
  942. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  943. CRT,RUN,VERT_RETRACE_START,0x81,0x00,0x5f
  944. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0xa2,0xeb,0xff
  945. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  946. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  947. CRT,RUN,MODE_CONTROL,0x02
  948. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  949. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  950. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  951. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  952. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  953. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  954. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  955. # Lock CRTC Reg 11 for compatibility
  956. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  957. # Dump ENG Register
  958. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  959. # Dump MISCOUT Register
  960. DIR,RUN,MISC_WRITE,0xef
  961. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  962. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  963. CLK_IND, RUN, FREQ_2, 0xa9
  964. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  965. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  966. CRT,RUN,LATCH_DATA, 0x08
  967.  
  968. [1152,864,8,64,70]
  969. # Unlock CRTC
  970. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  971. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  972. CRT,RUN,REG_LOCK_1,0x48,0xa5
  973. # Dump CRT Controller Registers
  974. CRT,RUN,HORZ_TOTAL,0x57,0x47,0x48,0x9a,0x4a,0x0f,0x92,0xff,0x00,0x60
  975. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  976. CRT,RUN,VERT_RETRACE_START,0x6b,0x02,0x5f
  977. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0x7d,0xeb,0xff
  978. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  979. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  980. CRT,RUN,MODE_CONTROL,0x02
  981. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  982. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  983. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  984. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  985. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  986. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  987. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  988. # Lock CRTC Reg 11 for compatibility
  989. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  990. # Dump ENG Register
  991. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  992. # Dump MISCOUT Register
  993. DIR,RUN,MISC_WRITE,0xef
  994. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  995. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  996. CLK_IND, RUN, FREQ_2, 0x9b
  997. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  998. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  999. CRT,RUN,LATCH_DATA, 0x08
  1000.  
  1001. [1152,864,8,56,60]
  1002. # Unlock CRTC
  1003. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1004. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1005. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1006. # Dump CRT Controller Registers
  1007. CRT,RUN,HORZ_TOTAL,0x57,0x47,0x48,0x9b,0x49,0x0d,0xac,0xff,0x00,0x60
  1008. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1009. CRT,RUN,VERT_RETRACE_START,0x77,0x10,0x5f
  1010. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0xac,0xeb,0xff
  1011. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1012. CRT,RUN,MISC_1,0x15,0xb1,0x9f,0x11
  1013. CRT,RUN,MODE_CONTROL,0x02
  1014. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1015. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  1016. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1017. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1018. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1019. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1020. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1021. # Lock CRTC Reg 11 for compatibility
  1022. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1023. # Dump ENG Register
  1024. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1025. # Dump MISCOUT Register
  1026. DIR,RUN,MISC_WRITE,0xef
  1027. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1028. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1029. CLK_IND, RUN, FREQ_2, 0x90
  1030. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1031. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1032. CRT,RUN,LATCH_DATA, 0x08
  1033.  
  1034.  
  1035. [1152,864,16,82,90]
  1036. # Unlock CRTC
  1037. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1038. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1039. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1040. # Dump CRT Controller Registers
  1041. CRT,RUN,HORZ_TOTAL,0x59,0x47,0x48,0x9c,0x4a,0x0e,0x95,0xff,0x00,0x60
  1042. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1043. CRT,RUN,VERT_RETRACE_START,0x65,0x04,0x5f
  1044. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0x99,0xeb,0xff
  1045. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x08,0x00
  1046. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  1047. CRT,RUN,MODE_CONTROL,0x02
  1048. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1049. CRT,RUN,GENERAL_OUTPUT_PORT,0x32
  1050. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1051. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1052. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1053. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1054. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1055. # Lock CRTC Reg 11 for compatibility
  1056. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1057. # Dump ENG Register
  1058. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1059. # Dump MISCOUT Register
  1060. DIR,RUN,MISC_WRITE,0xef
  1061. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1062. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1063. CLK_IND, RUN, FREQ_2, 0xb9
  1064. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1065. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1066. CRT,RUN,LATCH_DATA, 0x00
  1067.  
  1068.  
  1069. [1152,864,16,71,75]
  1070. # Unlock CRTC
  1071. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1072. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1073. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1074. # Dump CRT Controller Registers
  1075. CRT,RUN,HORZ_TOTAL,0x5a,0x47,0x48,0x9d,0x4b,0x0f,0xb7,0xff,0x00,0x60
  1076. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1077. CRT,RUN,VERT_RETRACE_START,0x81,0x00,0x5f
  1078. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0xa2,0xeb,0xff
  1079. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x08,0x00
  1080. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  1081. CRT,RUN,MODE_CONTROL,0x02
  1082. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1083. CRT,RUN,GENERAL_OUTPUT_PORT,0x32
  1084. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1085. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1086. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1087. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1088. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1089. # Lock CRTC Reg 11 for compatibility
  1090. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1091. # Dump ENG Register
  1092. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1093. # Dump MISCOUT Register
  1094. DIR,RUN,MISC_WRITE,0xef
  1095. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1096. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1097. CLK_IND, RUN, FREQ_2, 0xa9
  1098. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1099. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1100. CRT,RUN,LATCH_DATA, 0x00
  1101.  
  1102.  
  1103. [1152,864,16,64,70]
  1104. # Unlock CRTC
  1105. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1106. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1107. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1108. # Dump CRT Controller Registers
  1109. CRT,RUN,HORZ_TOTAL,0x57,0x47,0x48,0x9a,0x4a,0x0f,0x92,0xff,0x00,0x60
  1110. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1111. CRT,RUN,VERT_RETRACE_START,0x6b,0x02,0x5f
  1112. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0x7d,0xeb,0xff
  1113. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x08,0x00
  1114. CRT,RUN,MISC_1,0x15,0x4f,0x9f,0x11
  1115. CRT,RUN,MODE_CONTROL,0x02
  1116. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1117. CRT,RUN,GENERAL_OUTPUT_PORT,0x32
  1118. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1119. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1120. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1121. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1122. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1123. # Lock CRTC Reg 11 for compatibility
  1124. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1125. # Dump ENG Register
  1126. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1127. # Dump MISCOUT Register
  1128. DIR,RUN,MISC_WRITE,0xef
  1129. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1130. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1131. CLK_IND, RUN, FREQ_2, 0x9b
  1132. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1133. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1134. CRT,RUN,LATCH_DATA, 0x00
  1135.  
  1136. [1152,864,16,56,60]
  1137. # Unlock CRTC
  1138. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1139. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1140. CRT,RUN,REG_LOCK_1,0x48,0xA5
  1141. # Dump CRT Controller Registers
  1142. CRT,RUN,HORZ_TOTAL,0x57,0x47,0x48,0x9b,0x49,0x0d,0xac,0xff,0x00,0x60
  1143. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1144. CRT,RUN,VERT_RETRACE_START,0x77,0x10,0x5f
  1145. CRT,RUN,UNDERLINE_LOCATION,0x60,0x6f,0xac,0xeb,0xff
  1146. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x08,0x00
  1147. CRT,RUN,MISC_1,0x15,0xb1,0x9f,0x11
  1148. CRT,RUN,MODE_CONTROL,0x02
  1149. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1150. CRT,RUN,GENERAL_OUTPUT_PORT,0x32
  1151. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1152. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1153. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1154. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1155. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1156. # Lock CRTC Reg 11 for compatibility
  1157. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1158. # Dump ENG Register
  1159. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1160. # Dump MISCOUT Register
  1161. DIR,RUN,MISC_WRITE,0xef
  1162. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1163. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1164. CLK_IND, RUN, FREQ_2, 0x90
  1165. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1166. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1167. CRT,RUN,LATCH_DATA, 0x00
  1168.  
  1169. [1024,768,16,96,120]
  1170. # Unlock CRTC
  1171. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1172. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1173. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1174. # Dump CRT Controller Registers
  1175. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x11,0x43,0x0e,0x28,0xf5,0x00,0x60
  1176. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1177. CRT,RUN,VERT_RETRACE_START,0x00,0x02,0xff
  1178. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1179. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1180. CRT,RUN,MISC_1,0x15,0x49,0x20,0x11
  1181. CRT,RUN,MODE_CONTROL,0x02
  1182. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1183. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  1184. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1185. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1186. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1187. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1188. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1189. # Lock CRTC Reg 11 for compatibility
  1190. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1191. # Dump ENG Register
  1192. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1193. # Dump MISCOUT Register
  1194. DIR,RUN,MISC_WRITE,0xef
  1195. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1196. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1197. CLK_IND, RUN, FREQ_2, 0xbd
  1198. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1199. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1200. CRT,RUN,LATCH_DATA, 0x00
  1201.  
  1202. [1024,768,16,81,100]
  1203. # Unlock CRTC
  1204. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1205. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1206. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1207. # Dump CRT Controller Registers
  1208. CRT,RUN,HORZ_TOTAL,0x4f,0x3f,0x40,0x12,0x42,0x0b,0x24,0xf5,0x00,0x60
  1209. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1210. CRT,RUN,VERT_RETRACE_START,0x01,0x07,0xff
  1211. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1212. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1213. CRT,RUN,MISC_1,0x15,0x49,0x20,0x11
  1214. CRT,RUN,MODE_CONTROL,0x02
  1215. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1216. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  1217. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1218. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1219. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1220. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1221. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1222. # Lock CRTC Reg 11 for compatibility
  1223. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1224. # Dump ENG Register
  1225. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1226. # Dump MISCOUT Register
  1227. DIR,RUN,MISC_WRITE,0xef
  1228. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1229. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1230. CLK_IND, RUN, FREQ_2, 0xa9
  1231. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1232. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1233. CRT,RUN,LATCH_DATA, 0x00
  1234.  
  1235. [1024,768,16,64,80]
  1236. # Unlock CRTC
  1237. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1238. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1239. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1240. # Dump CRT Controller Registers
  1241. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x11,0x44,0x0b,0x26,0xf5,0x00,0x60
  1242. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1243. CRT,RUN,VERT_RETRACE_START,0x0a,0x08,0xff
  1244. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1245. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1246. CRT,RUN,MISC_1,0x15,0x47,0x20,0x11
  1247. CRT,RUN,MODE_CONTROL,0x02
  1248. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1249. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  1250. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1251. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1252. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1253. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1254. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1255. # Lock CRTC Reg 11 for compatibility
  1256. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1257. # Dump ENG Register
  1258. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1259. # Dump MISCOUT Register
  1260. DIR,RUN,MISC_WRITE,0xef
  1261. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1262. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1263. CLK_IND, RUN, FREQ_2, 0x93
  1264. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1265. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1266. CRT,RUN,LATCH_DATA, 0x00
  1267.  
  1268. [1024,768,16,60,75]
  1269. # Unlock CRTC
  1270. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1271. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1272. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1273. # Dump CRT Controller Registers
  1274. CRT,RUN,HORZ_TOTAL,0x4d,0x3f,0x40,0x11,0x41,0x07,0x1e,0xf5,0x00,0x60
  1275. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1276. CRT,RUN,VERT_RETRACE_START,0x00,0x03,0xff
  1277. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1e,0xe3,0xff
  1278. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1279. CRT,RUN,MISC_1,0x15,0x47,0x20,0x11
  1280. CRT,RUN,MODE_CONTROL,0x02
  1281. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1282. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  1283. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1284. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1285. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1286. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1287. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1288. # Lock CRTC Reg 11 for compatibility
  1289. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1290. # Dump ENG Register
  1291. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1292. # Dump MISCOUT Register
  1293. DIR,RUN,MISC_WRITE,0xef
  1294. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1295. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1296. CLK_IND, RUN, FREQ_2, 0x8c
  1297. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1298. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1299. CRT,RUN,LATCH_DATA, 0x00
  1300.  
  1301. [1024,768,16,58,72]
  1302. # Unlock CRTC
  1303. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1304. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1305. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1306. # Dump CRT Controller Registers
  1307. CRT,RUN,HORZ_TOTAL,0x4c,0x3f,0x40,0x13,0x42,0x0f,0x20,0xf5,0x00,0x60
  1308. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1309. CRT,RUN,VERT_RETRACE_START,0x00,0x06,0xff
  1310. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1a,0xe3,0xff
  1311. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1312. CRT,RUN,MISC_1,0x15,0x45,0x20,0x11
  1313. CRT,RUN,MODE_CONTROL,0x02
  1314. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1315. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  1316. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1317. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1318. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1319. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1320. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1321. # Lock CRTC Reg 11 for compatibility
  1322. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1323. # Dump ENG Register
  1324. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1325. # Dump MISCOUT Register
  1326. DIR,RUN,MISC_WRITE,0xef
  1327. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1328. CLK_IND, RUN, FREQ_2,0x88
  1329. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1330. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1331. CLK_IND, RUN, FREQ_2, 0x88
  1332. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1333. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1334. CRT,RUN,LATCH_DATA, 0x00
  1335.  
  1336. [1024,768,16,56,70]
  1337. # Unlock CRTC
  1338. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1339. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1340. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1341. # Dump CRT Controller Registers
  1342. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x12,0x41,0x0a,0x24,0xf5,0x00,0x60
  1343. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1344. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  1345. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1346. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1347. CRT,RUN,MISC_1,0x15,0x47,0x20,0x11
  1348. CRT,RUN,MODE_CONTROL,0x02
  1349. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1350. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  1351. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1352. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1353. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1354. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1355. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1356. # Lock CRTC Reg 11 for compatibility
  1357. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1358. # Dump ENG Register
  1359. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1360. # Dump MISCOUT Register
  1361. DIR,RUN,MISC_WRITE,0xef
  1362. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1363. CLK_IND, RUN, FREQ_2,0x88
  1364. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1365. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1366. CLK_IND, RUN, FREQ_2, 0x88
  1367. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1368. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1369. CRT,RUN,LATCH_DATA, 0x00
  1370.  
  1371. [1024,768,16,48,60]
  1372. # Unlock CRTC
  1373. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1374. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1375. CRT,RUN,REG_LOCK_1,0x48,0xA5
  1376. # Dump CRT Controller Registers
  1377. CRT,RUN,HORZ_TOTAL,0x4f,0x3f,0x40,0x12,0x41,0x0a,0x24,0xf5,0x00,0x60
  1378. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1379. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  1380. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1381. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1382. CRT,RUN,MISC_1,0x15,0x48,0x20,0x11
  1383. CRT,RUN,MODE_CONTROL,0x02
  1384. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1385. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  1386. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1387. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1388. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1389. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1390. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1391. # Lock CRTC Reg 11 for compatibility
  1392. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1393. # Dump ENG Register
  1394. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1395. # Dump MISCOUT Register
  1396. DIR,RUN,MISC_WRITE,0xef
  1397. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1398. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1399. CLK_IND, RUN, FREQ_2, 0x7E
  1400. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1401. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1402. CRT,RUN,LATCH_DATA, 0x00
  1403.  
  1404. [1024,768,8,96,120]
  1405. # Unlock CRTC
  1406. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1407. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1408. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1409. # Dump CRT Controller Registers
  1410. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x11,0x43,0x0e,0x28,0xf5,0x00,0x60
  1411. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1412. CRT,RUN,VERT_RETRACE_START,0x00,0x02,0xff
  1413. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1414. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1415. CRT,RUN,MISC_1,0x15,0x49,0x25,0x11
  1416. CRT,RUN,MODE_CONTROL,0x02
  1417. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1418. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  1419. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1420. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1421. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1422. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1423. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1424. # Lock CRTC Reg 11 for compatibility
  1425. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1426. # Dump ENG Register
  1427. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1428. # Dump MISCOUT Register
  1429. DIR,RUN,MISC_WRITE,0xef
  1430. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1431. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1432. CLK_IND, RUN, FREQ_2, 0xbd
  1433. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1434. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1435. CRT,RUN,LATCH_DATA, 0x08
  1436.  
  1437. [1024,768,8,81,100]
  1438. # Unlock CRTC
  1439. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1440. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1441. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1442. # Dump CRT Controller Registers
  1443. CRT,RUN,HORZ_TOTAL,0x4f,0x3f,0x40,0x12,0x42,0x0b,0x24,0xf5,0x00,0x60
  1444. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1445. CRT,RUN,VERT_RETRACE_START,0x01,0x07,0xff
  1446. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1447. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1448. CRT,RUN,MISC_1,0x15,0x49,0x25,0x11
  1449. CRT,RUN,MODE_CONTROL,0x02
  1450. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1451. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  1452. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1453. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1454. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1455. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1456. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1457. # Lock CRTC Reg 11 for compatibility
  1458. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1459. # Dump ENG Register
  1460. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1461. # Dump MISCOUT Register
  1462. DIR,RUN,MISC_WRITE,0xef
  1463. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1464. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1465. CLK_IND, RUN, FREQ_2, 0xa9
  1466. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1467. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1468. CRT,RUN,LATCH_DATA, 0x08
  1469.  
  1470.  
  1471. [1024,768,8,64,80]
  1472. # Unlock CRTC
  1473. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1474. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1475. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1476. # Dump CRT Controller Registers
  1477. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x11,0x44,0x0b,0x26,0xf5,0x00,0x60
  1478. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1479. CRT,RUN,VERT_RETRACE_START,0x0a,0x08,0xff
  1480. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1481. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1482. CRT,RUN,MISC_1,0x15,0x47,0x25,0x11
  1483. CRT,RUN,MODE_CONTROL,0x02
  1484. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1485. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  1486. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1487. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1488. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1489. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1490. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1491. # Lock CRTC Reg 11 for compatibility
  1492. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1493. # Dump ENG Register
  1494. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1495. # Dump MISCOUT Register
  1496. DIR,RUN,MISC_WRITE,0xef
  1497. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1498. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1499. CLK_IND, RUN, FREQ_2, 0x93
  1500. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1501. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1502. CRT,RUN,LATCH_DATA, 0x08
  1503.  
  1504. [1024,768,8,60,75]
  1505. # Unlock CRTC
  1506. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1507. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1508. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1509. # Dump CRT Controller Registers
  1510. CRT,RUN,HORZ_TOTAL,0x4d,0x3f,0x40,0x11,0x41,0x07,0x1e,0xf5,0x00,0x60
  1511. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1512. CRT,RUN,VERT_RETRACE_START,0x00,0x03,0xff
  1513. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1e,0xe3,0xff
  1514. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1515. CRT,RUN,MISC_1,0x15,0x47,0x25,0x11
  1516. CRT,RUN,MODE_CONTROL,0x02
  1517. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1518. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  1519. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1520. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1521. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1522. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1523. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1524. # Lock CRTC Reg 11 for compatibility
  1525. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1526. # Dump ENG Register
  1527. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1528. # Dump MISCOUT Register
  1529. DIR,RUN,MISC_WRITE,0xef
  1530. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1531. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1532. CLK_IND, RUN, FREQ_2, 0x8c
  1533. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1534. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1535. CRT,RUN,LATCH_DATA, 0x08
  1536.  
  1537. [1024,768,8,58,72]
  1538. # Unlock CRTC
  1539. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1540. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1541. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1542. # Dump CRT Controller Registers
  1543. CRT,RUN,HORZ_TOTAL,0x4c,0x3f,0x40,0x13,0x42,0x0f,0x20,0xf5,0x00,0x60
  1544. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1545. CRT,RUN,VERT_RETRACE_START,0x00,0x06,0xff
  1546. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x1a,0xe3,0xff
  1547. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1548. CRT,RUN,MISC_1,0x15,0x45,0x25,0x11
  1549. CRT,RUN,MODE_CONTROL,0x02
  1550. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1551. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  1552. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1553. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1554. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1555. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1556. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1557. # Lock CRTC Reg 11 for compatibility
  1558. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1559. # Dump ENG Register
  1560. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1561. # Dump MISCOUT Register
  1562. DIR,RUN,MISC_WRITE,0xef
  1563. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1564. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1565. CLK_IND, RUN, FREQ_2, 0x88
  1566. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1567. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1568. CRT,RUN,LATCH_DATA, 0x08
  1569.  
  1570. [1024,768,8,56,70]
  1571. # Unlock CRTC
  1572. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1573. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1574. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1575. # Dump CRT Controller Registers
  1576. CRT,RUN,HORZ_TOTAL,0x4e,0x3f,0x40,0x12,0x41,0x0a,0x24,0xf5,0x00,0x60
  1577. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1578. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  1579. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1580. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1581. CRT,RUN,MISC_1,0x15,0x47,0x25,0x11
  1582. CRT,RUN,MODE_CONTROL,0x02
  1583. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1584. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  1585. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1586. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1587. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1588. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1589. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1590. # Lock CRTC Reg 11 for compatibility
  1591. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1592. # Dump ENG Register
  1593. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1594. # Dump MISCOUT Register
  1595. DIR,RUN,MISC_WRITE,0xef
  1596. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1597. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1598. CLK_IND, RUN, FREQ_2, 0x88
  1599. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1600. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1601. CRT,RUN,LATCH_DATA, 0x08
  1602.  
  1603. [1024,768,8,48,60]
  1604. # Unlock CRTC
  1605. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1606. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1607. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1608. # Dump CRT Controller Registers
  1609. CRT,RUN,HORZ_TOTAL,0x4f,0x3f,0x40,0x12,0x41,0x0a,0x24,0xf5,0x00,0x60
  1610. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1611. CRT,RUN,VERT_RETRACE_START,0x02,0x08,0xff
  1612. CRT,RUN,UNDERLINE_LOCATION,0x00,0xff,0x24,0xe3,0xff
  1613. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  1614. CRT,RUN,MISC_1,0x15,0x48,0x25,0x11
  1615. CRT,RUN,MODE_CONTROL,0x02
  1616. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1617. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  1618. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1619. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1620. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1621. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  1622. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1623. # Lock CRTC Reg 11 for compatibility
  1624. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1625. # Dump ENG Register
  1626. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1627. # Dump MISCOUT Register
  1628. DIR,RUN,MISC_WRITE,0xef
  1629. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  1630. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1631. CLK_IND, RUN, FREQ_2, 0x7e
  1632. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1633. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1634. CRT,RUN,LATCH_DATA, 0x08
  1635.  
  1636. [800,600,32,75,120]
  1637. # Unlock CRTC
  1638. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1639. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1640. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1641. # Dump CRT Controller Registers
  1642. CRT,RUN,HORZ_TOTAL,0x39,0x33,0x31,0x00,0x32,0x1a,0x83,0xf0,0x00,0x60
  1643. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1644. CRT,RUN,VERT_RETRACE_START,0x5a,0x0c,0x57
  1645. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1646. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1647. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  1648. CRT,RUN,MODE_CONTROL,0x02
  1649. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1650. CRT,RUN,GENERAL_OUTPUT_PORT,0x32
  1651. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1652. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1653. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1654. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  1655. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1656. # Lock CRTC Reg 11 for compatibility
  1657. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1658. # Dump ENG Register
  1659. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1660. # Dump MISCOUT Register
  1661. DIR,RUN,MISC_WRITE,0xef
  1662. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1663. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1664. CLK_IND, RUN, FREQ_2, 0x8a
  1665. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1666. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1667. CRT,RUN,LATCH_DATA, 0x00
  1668.  
  1669. [800,600,32,64,100]
  1670. # Unlock CRTC
  1671. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1672. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1673. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1674. # Dump CRT Controller Registers
  1675. CRT,RUN,HORZ_TOTAL,0x3a,0x33,0x31,0x00,0x34,0x1a,0x82,0xf0,0x00,0x60
  1676. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1677. CRT,RUN,VERT_RETRACE_START,0x63,0x02,0x57
  1678. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1679. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1680. CRT,RUN,MISC_1,0x15,0x33,0x1e,0x11
  1681. CRT,RUN,MODE_CONTROL,0x02
  1682. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1683. CRT,RUN,GENERAL_OUTPUT_PORT,0x32
  1684. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1685. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1686. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1687. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  1688. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1689. # Lock CRTC Reg 11 for compatibility
  1690. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1691. # Dump ENG Register
  1692. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1693. # Dump MISCOUT Register
  1694. DIR,RUN,MISC_WRITE,0xef
  1695. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1696. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1697. CLK_IND, RUN, FREQ_2, 0x7e
  1698. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1699. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1700. CRT,RUN,LATCH_DATA, 0x00
  1701.  
  1702. [800,600,32,56,90]
  1703. # Unlock CRTC
  1704. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1705. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1706. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1707. # Dump CRT Controller Registers
  1708. CRT,RUN,HORZ_TOTAL,0x3b,0x33,0x31,0x00,0x34,0x1a,0x72,0xf0,0x00,0x60
  1709. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1710. CRT,RUN,VERT_RETRACE_START,0x60,0x02,0x57
  1711. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1712. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1713. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  1714. CRT,RUN,MODE_CONTROL,0x02
  1715. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1716. CRT,RUN,GENERAL_OUTPUT_PORT,0x32
  1717. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1718. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1719. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1720. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  1721. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1722. # Lock CRTC Reg 11 for compatibility
  1723. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1724. # Dump ENG Register
  1725. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1726. # Dump MISCOUT Register
  1727. DIR,RUN,MISC_WRITE,0xef
  1728. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1729. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1730. CLK_IND, RUN, FREQ_2, 0x70
  1731. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1732. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1733. CRT,RUN,LATCH_DATA, 0x00
  1734.  
  1735. [800,600,32,46,75]
  1736. # Unlock CRTC
  1737. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1738. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1739. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1740. # Dump CRT Controller Registers
  1741. CRT,RUN,HORZ_TOTAL,0x3d,0x33,0x31,0x00,0x33,0x18,0x6f,0xe0,0x00,0x60
  1742. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1743. CRT,RUN,VERT_RETRACE_START,0x58,0x0b,0x57
  1744. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1745. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1746. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  1747. CRT,RUN,MODE_CONTROL,0x02
  1748. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1749. CRT,RUN,GENERAL_OUTPUT_PORT,0x32
  1750. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  1751. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1752. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1753. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  1754. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1755. # Lock CRTC Reg 11 for compatibility
  1756. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1757. # Dump ENG Register
  1758. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1759. # Dump MISCOUT Register
  1760. DIR,RUN,MISC_WRITE,0xef
  1761. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1762. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1763. CLK_IND, RUN, FREQ_2, 0x60
  1764. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1765. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1766. CRT,RUN,LATCH_DATA, 0x00
  1767.  
  1768. [800,600,32,48,72]
  1769. # Unlock CRTC
  1770. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1771. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1772. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1773. # Dump CRT Controller Registers
  1774. CRT,RUN,HORZ_TOTAL,0x3c,0x33,0x31,0x00,0x35,0x1d,0x98,0xf0,0x00,0x60
  1775. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1776. CRT,RUN,VERT_RETRACE_START,0x7c,0x22,0x57
  1777. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1778. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1779. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  1780. CRT,RUN,MODE_CONTROL,0x02
  1781. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1782. CRT,RUN,GENERAL_OUTPUT_PORT,0x32
  1783. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1784. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1785. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1786. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  1787. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1788. # Lock CRTC Reg 11 for compatibility
  1789. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1790. # Dump ENG Register
  1791. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1792. # Dump MISCOUT Register
  1793. DIR,RUN,MISC_WRITE,0xef
  1794. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1795. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1796. CLK_IND, RUN, FREQ_2, 0x61
  1797. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1798. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1799. CRT,RUN,LATCH_DATA, 0x00
  1800.  
  1801. [800,600,32,37,60]
  1802. # Unlock CRTC
  1803. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1804. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1805. CRT,RUN,REG_LOCK_1,0x48,0xA5
  1806. # Dump CRT Controller Registers
  1807. CRT,RUN,HORZ_TOTAL,0x3d,0x33,0x31,0x00,0x34,0x1c,0x72,0xf0,0x00,0x60
  1808. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1809. CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
  1810. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1811. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1812. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  1813. CRT,RUN,MODE_CONTROL,0x02
  1814. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1815. CRT,RUN,GENERAL_OUTPUT_PORT,0x32
  1816. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  1817. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1818. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1819. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  1820. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1821. # Lock CRTC Reg 11 for compatibility
  1822. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1823. # Dump ENG Register
  1824. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1825. # Dump MISCOUT Register
  1826. DIR,RUN,MISC_WRITE,0xef
  1827. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1828. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1829. CLK_IND, RUN, FREQ_2, 0x4D
  1830. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1831. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1832. CRT,RUN,LATCH_DATA, 0x00
  1833.  
  1834.  
  1835. [800,600,32,35,56]
  1836. # Unlock CRTC
  1837. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1838. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1839. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1840. # Dump CRT Controller Registers
  1841. CRT,RUN,HORZ_TOTAL,0x3b,0x33,0x31,0x00,0x33,0x18,0x6f,0xf0,0x00,0x60
  1842. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1843. CRT,RUN,VERT_RETRACE_START,0x58,0x0a,0x57
  1844. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1845. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1846. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  1847. CRT,RUN,MODE_CONTROL,0x02
  1848. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1849. CRT,RUN,GENERAL_OUTPUT_PORT,0x32
  1850. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1851. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1852. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1853. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x05,0xae,0x00,0x00
  1854. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1855. # Lock CRTC Reg 11 for compatibility
  1856. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1857. # Dump ENG Register
  1858. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1859. # Dump MISCOUT Register
  1860. DIR,RUN,MISC_WRITE,0xef
  1861. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1862. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1863. CLK_IND, RUN, FREQ_2, 0x45
  1864. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1865. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1866. CRT,RUN,LATCH_DATA, 0x00
  1867.  
  1868. [800,600,24,75,120]
  1869. # Unlock CRTC
  1870. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1871. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1872. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1873. # Dump CRT Controller Registers
  1874. CRT,RUN,HORZ_TOTAL,0x58,0x4c,0x4a,0x00,0x4b,0x14,0x82,0xf0,0x00,0x60
  1875. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1876. CRT,RUN,VERT_RETRACE_START,0x59,0x0b,0x57
  1877. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1878. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1879. CRT,RUN,MISC_1,0x15,0x73,0x21,0x11
  1880. CRT,RUN,MODE_CONTROL,0x02
  1881. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1882. CRT,RUN,GENERAL_OUTPUT_PORT,0x32
  1883. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1884. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1885. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1886. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  1887. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1888. # Lock CRTC Reg 11 for compatibility
  1889. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1890. # Dump ENG Register
  1891. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1892. # Dump MISCOUT Register
  1893. DIR,RUN,MISC_WRITE,0xef
  1894. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1895. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1896. CLK_IND, RUN, FREQ_2, 0x8a
  1897. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1898. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1899. CRT,RUN,LATCH_DATA, 0x00
  1900.  
  1901.  
  1902. [800,600,24,64,100]
  1903. # Unlock CRTC
  1904. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1905. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1906. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1907. # Dump CRT Controller Registers
  1908. CRT,RUN,HORZ_TOTAL,0x5b,0x4c,0x4a,0x00,0x4d,0x16,0x7a,0xf0,0x00,0x60
  1909. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1910. CRT,RUN,VERT_RETRACE_START,0x59,0x08,0x57
  1911. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1912. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1913. CRT,RUN,MISC_1,0x15,0x58,0x2f,0x11
  1914. CRT,RUN,MODE_CONTROL,0x02
  1915. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1916. CRT,RUN,GENERAL_OUTPUT_PORT,0x32
  1917. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1918. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1919. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1920. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  1921. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1922. # Lock CRTC Reg 11 for compatibility
  1923. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1924. # Dump ENG Register
  1925. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1926. # Dump MISCOUT Register
  1927. DIR,RUN,MISC_WRITE,0xef
  1928. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1929. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1930. CLK_IND, RUN, FREQ_2, 0x7e
  1931. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1932. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1933. CRT,RUN,LATCH_DATA, 0x00
  1934.  
  1935.  
  1936. [800,600,24,56,90]
  1937. # Unlock CRTC
  1938. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1939. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1940. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1941. # Dump CRT Controller Registers
  1942. CRT,RUN,HORZ_TOTAL,0x5b,0x4c,0x4a,0x00,0x4f,0x1b,0x6f,0xf0,0x00,0x60
  1943. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1944. CRT,RUN,VERT_RETRACE_START,0x57,0x09,0x57
  1945. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1946. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1947. CRT,RUN,MISC_1,0x15,0x55,0x2f,0x11
  1948. CRT,RUN,MODE_CONTROL,0x02
  1949. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1950. CRT,RUN,GENERAL_OUTPUT_PORT,0x32
  1951. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1952. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1953. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1954. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  1955. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1956. # Lock CRTC Reg 11 for compatibility
  1957. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1958. # Dump ENG Register
  1959. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1960. # Dump MISCOUT Register
  1961. DIR,RUN,MISC_WRITE,0xef
  1962. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1963. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1964. CLK_IND, RUN, FREQ_2, 0x70
  1965. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  1966. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  1967. CRT,RUN,LATCH_DATA, 0x00
  1968.  
  1969.  
  1970. [800,600,24,46,75]
  1971. # Unlock CRTC
  1972. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  1973. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  1974. CRT,RUN,REG_LOCK_1,0x48,0xa5
  1975. # Dump CRT Controller Registers
  1976. CRT,RUN,HORZ_TOTAL,0x5e,0x4c,0x4a,0x00,0x52,0x1a,0x6f,0xe0,0x00,0x60
  1977. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  1978. CRT,RUN,VERT_RETRACE_START,0x58,0x0b,0x57
  1979. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  1980. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  1981. CRT,RUN,MISC_1,0x15,0x58,0x2f,0x11
  1982. CRT,RUN,MODE_CONTROL,0x02
  1983. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  1984. CRT,RUN,GENERAL_OUTPUT_PORT,0x32
  1985. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  1986. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  1987. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  1988. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  1989. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  1990. # Lock CRTC Reg 11 for compatibility
  1991. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  1992. # Dump ENG Register
  1993. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  1994. # Dump MISCOUT Register
  1995. DIR,RUN,MISC_WRITE,0xef
  1996. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  1997. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  1998. CLK_IND, RUN, FREQ_2, 0x60
  1999. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2000. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2001. CRT,RUN,LATCH_DATA, 0x00
  2002.  
  2003.  
  2004. [800,600,24,48,72]
  2005. # Unlock CRTC
  2006. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2007. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2008. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2009. # Dump CRT Controller Registers
  2010. CRT,RUN,HORZ_TOTAL,0x5e,0x4c,0x4a,0x00,0x4f,0x1b,0x8e,0xf0,0x00,0x60
  2011. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2012. CRT,RUN,VERT_RETRACE_START,0x71,0x27,0x57
  2013. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2014. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  2015. CRT,RUN,MISC_1,0x15,0x58,0x2f,0x11
  2016. CRT,RUN,MODE_CONTROL,0x02
  2017. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2018. CRT,RUN,GENERAL_OUTPUT_PORT,0x32
  2019. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2020. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2021. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2022. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  2023. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2024. # Lock CRTC Reg 11 for compatibility
  2025. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2026. # Dump ENG Register
  2027. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2028. # Dump MISCOUT Register
  2029. DIR,RUN,MISC_WRITE,0xef
  2030. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2031. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2032. CLK_IND, RUN, FREQ_2, 0x61
  2033. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2034. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2035. CRT,RUN,LATCH_DATA, 0x00
  2036.  
  2037. [800,600,24,37,60]
  2038. # Unlock CRTC
  2039. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2040. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2041. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2042. # Dump CRT Controller Registers
  2043. CRT,RUN,HORZ_TOTAL,0x5e,0x4c,0x4a,0x00,0x4f,0x1b,0x72,0xf0,0x00,0x60
  2044. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2045. CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
  2046. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2047. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  2048. CRT,RUN,MISC_1,0x15,0x58,0x2f,0x11
  2049. CRT,RUN,MODE_CONTROL,0x02
  2050. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2051. CRT,RUN,GENERAL_OUTPUT_PORT,0x32
  2052. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2053. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2054. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2055. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  2056. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2057. # Lock CRTC Reg 11 for compatibility
  2058. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2059. # Dump ENG Register
  2060. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2061. # Dump MISCOUT Register
  2062. DIR,RUN,MISC_WRITE,0xef
  2063. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2064. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2065. CLK_IND, RUN, FREQ_2, 0x4d
  2066. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2067. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2068. CRT,RUN,LATCH_DATA, 0x00
  2069.  
  2070.  
  2071. [800,600,24,35,56]
  2072. # Unlock CRTC
  2073. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2074. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2075. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2076. # Dump CRT Controller Registers
  2077. CRT,RUN,HORZ_TOTAL,0x5b,0x4c,0x4a,0x00,0x4f,0x18,0x72,0xf0,0x00,0x60
  2078. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2079. CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
  2080. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2081. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x04,0x00
  2082. CRT,RUN,MISC_1,0x15,0x58,0x2f,0x11
  2083. CRT,RUN,MODE_CONTROL,0x02
  2084. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2085. CRT,RUN,GENERAL_OUTPUT_PORT,0x32
  2086. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2087. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2088. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2089. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  2090. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2091. # Lock CRTC Reg 11 for compatibility
  2092. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2093. # Dump ENG Register
  2094. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2095. # Dump MISCOUT Register
  2096. DIR,RUN,MISC_WRITE,0xef
  2097. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2098. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2099. CLK_IND, RUN, FREQ_2, 0x45
  2100. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2101. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2102. CRT,RUN,LATCH_DATA, 0x00
  2103.  
  2104. [800,600,16,75,120]
  2105. # Unlock CRTC
  2106. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2107. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2108. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2109. # Dump CRT Controller Registers
  2110. CRT,RUN,HORZ_TOTAL,0x39,0x33,0x31,0x00,0x32,0x1a,0x83,0xf0,0x00,0x60
  2111. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2112. CRT,RUN,VERT_RETRACE_START,0x5a,0x0c,0x57
  2113. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2114. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2115. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  2116. CRT,RUN,MODE_CONTROL,0x02
  2117. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2118. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  2119. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2120. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2121. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2122. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  2123. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2124. # Lock CRTC Reg 11 for compatibility
  2125. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2126. # Dump ENG Register
  2127. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2128. # Dump MISCOUT Register
  2129. DIR,RUN,MISC_WRITE,0xef
  2130. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2131. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2132. CLK_IND, RUN, FREQ_2, 0x8a
  2133. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2134. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2135. CRT,RUN,LATCH_DATA, 0x00
  2136.  
  2137. [800,600,16,64,100]
  2138. # Unlock CRTC
  2139. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2140. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2141. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2142. # Dump CRT Controller Registers
  2143. CRT,RUN,HORZ_TOTAL,0x3a,0x33,0x31,0x00,0x34,0x1a,0x82,0xf0,0x00,0x60
  2144. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2145. CRT,RUN,VERT_RETRACE_START,0x63,0x02,0x57
  2146. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2147. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2148. CRT,RUN,MISC_1,0x15,0x33,0x1e,0x11
  2149. CRT,RUN,MODE_CONTROL,0x02
  2150. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2151. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  2152. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2153. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2154. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2155. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  2156. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2157. # Lock CRTC Reg 11 for compatibility
  2158. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2159. # Dump ENG Register
  2160. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2161. # Dump MISCOUT Register
  2162. DIR,RUN,MISC_WRITE,0xef
  2163. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2164. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2165. CLK_IND, RUN, FREQ_2, 0x7e
  2166. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2167. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2168. CRT,RUN,LATCH_DATA, 0x00
  2169.  
  2170. [800,600,16,56,90]
  2171. # Unlock CRTC
  2172. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2173. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2174. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2175. # Dump CRT Controller Registers
  2176. CRT,RUN,HORZ_TOTAL,0x3b,0x33,0x31,0x00,0x34,0x1a,0x72,0xf0,0x00,0x60
  2177. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2178. CRT,RUN,VERT_RETRACE_START,0x60,0x02,0x57
  2179. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2180. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2181. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  2182. CRT,RUN,MODE_CONTROL,0x02
  2183. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2184. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  2185. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2186. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2187. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2188. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  2189. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2190. # Lock CRTC Reg 11 for compatibility
  2191. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2192. # Dump ENG Register
  2193. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2194. # Dump MISCOUT Register
  2195. DIR,RUN,MISC_WRITE,0xef
  2196. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2197. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2198. CLK_IND, RUN, FREQ_2, 0x70
  2199. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2200. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2201. CRT,RUN,LATCH_DATA, 0x00
  2202.  
  2203. [800,600,16,46,75]
  2204. # Unlock CRTC
  2205. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2206. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2207. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2208. # Dump CRT Controller Registers
  2209. CRT,RUN,HORZ_TOTAL,0x3d,0x33,0x31,0x00,0x33,0x18,0x6f,0xe0,0x00,0x60
  2210. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2211. CRT,RUN,VERT_RETRACE_START,0x58,0x0b,0x57
  2212. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2213. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2214. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  2215. CRT,RUN,MODE_CONTROL,0x02
  2216. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2217. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  2218. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  2219. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2220. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2221. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  2222. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2223. # Lock CRTC Reg 11 for compatibility
  2224. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2225. # Dump ENG Register
  2226. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2227. # Dump MISCOUT Register
  2228. DIR,RUN,MISC_WRITE,0xef
  2229. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2230. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2231. CLK_IND, RUN, FREQ_2, 0x60
  2232. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2233. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2234. CRT,RUN,LATCH_DATA, 0x00
  2235.  
  2236. [800,600,16,48,72]
  2237. # Unlock CRTC
  2238. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2239. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2240. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2241. # Dump CRT Controller Registers
  2242. CRT,RUN,HORZ_TOTAL,0x3c,0x33,0x31,0x00,0x35,0x1d,0x98,0xf0,0x00,0x60
  2243. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2244. CRT,RUN,VERT_RETRACE_START,0x7c,0x22,0x57
  2245. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2246. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2247. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  2248. CRT,RUN,MODE_CONTROL,0x02
  2249. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2250. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  2251. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2252. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2253. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2254. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  2255. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2256. # Lock CRTC Reg 11 for compatibility
  2257. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2258. # Dump ENG Register
  2259. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2260. # Dump MISCOUT Register
  2261. DIR,RUN,MISC_WRITE,0xef
  2262. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2263. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2264. CLK_IND, RUN, FREQ_2, 0x61
  2265. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2266. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2267. CRT,RUN,LATCH_DATA, 0x00
  2268.  
  2269. [800,600,16,37,60]
  2270. # Unlock CRTC
  2271. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2272. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2273. CRT,RUN,REG_LOCK_1,0x48,0xA5
  2274. # Dump CRT Controller Registers
  2275. CRT,RUN,HORZ_TOTAL,0x3d,0x33,0x31,0x00,0x34,0x1c,0x72,0xf0,0x00,0x60
  2276. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2277. CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
  2278. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2279. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2280. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  2281. CRT,RUN,MODE_CONTROL,0x02
  2282. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2283. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  2284. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  2285. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2286. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2287. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  2288. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2289. # Lock CRTC Reg 11 for compatibility
  2290. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2291. # Dump ENG Register
  2292. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2293. # Dump MISCOUT Register
  2294. DIR,RUN,MISC_WRITE,0xef
  2295. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2296. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2297. CLK_IND, RUN, FREQ_2, 0x4D
  2298. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2299. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2300. CRT,RUN,LATCH_DATA, 0x00
  2301.  
  2302.  
  2303. [800,600,16,35,56]
  2304. # Unlock CRTC
  2305. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2306. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2307. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2308. # Dump CRT Controller Registers
  2309. CRT,RUN,HORZ_TOTAL,0x3b,0x33,0x31,0x00,0x33,0x18,0x6f,0xf0,0x00,0x60
  2310. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2311. CRT,RUN,VERT_RETRACE_START,0x58,0x0a,0x57
  2312. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2313. CRT,RUN,BACKWARD_COMP_1,0x00,0x00,0x00,0x00
  2314. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  2315. CRT,RUN,MODE_CONTROL,0x02
  2316. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2317. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  2318. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2319. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2320. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2321. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xae,0x00,0x00
  2322. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2323. # Lock CRTC Reg 11 for compatibility
  2324. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2325. # Dump ENG Register
  2326. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2327. # Dump MISCOUT Register
  2328. DIR,RUN,MISC_WRITE,0xef
  2329. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2330. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2331. CLK_IND, RUN, FREQ_2, 0x45
  2332. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2333. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2334. CRT,RUN,LATCH_DATA, 0x00
  2335.  
  2336. [800,600,8,75,120]
  2337. # Unlock CRTC
  2338. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2339. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2340. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2341. # Dump CRT Controller Registers
  2342. CRT,RUN,HORZ_TOTAL,0x39,0x31,0x31,0x00,0x32,0x1a,0x83,0xf0,0x00,0x60
  2343. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2344. CRT,RUN,VERT_RETRACE_START,0x5a,0x0c,0x57
  2345. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2346. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2347. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  2348. CRT,RUN,MODE_CONTROL,0x02
  2349. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2350. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  2351. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2352. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2353. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2354. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2355. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2356. # Lock CRTC Reg 11 for compatibility
  2357. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2358. # Dump ENG Register
  2359. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2360. # Dump MISCOUT Register
  2361. DIR,RUN,MISC_WRITE,0xef
  2362. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2363. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2364. CLK_IND, RUN, FREQ_2, 0x8a
  2365. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2366. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2367. CRT,RUN,LATCH_DATA, 0x08
  2368.  
  2369. [800,600,8,64,100]
  2370. # Unlock CRTC
  2371. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2372. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2373. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2374. # Dump CRT Controller Registers
  2375. CRT,RUN,HORZ_TOTAL,0x3a,0x31,0x31,0x00,0x34,0x1a,0x82,0xf0,0x00,0x60
  2376. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2377. CRT,RUN,VERT_RETRACE_START,0x63,0x02,0x57
  2378. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2379. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2380. CRT,RUN,MISC_1,0x15,0x33,0x1e,0x11
  2381. CRT,RUN,MODE_CONTROL,0x02
  2382. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2383. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  2384. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2385. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2386. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2387. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2388. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2389. # Lock CRTC Reg 11 for compatibility
  2390. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2391. # Dump ENG Register
  2392. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2393. # Dump MISCOUT Register
  2394. DIR,RUN,MISC_WRITE,0xef
  2395. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2396. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2397. CLK_IND, RUN, FREQ_2, 0x7e
  2398. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2399. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2400. CRT,RUN,LATCH_DATA, 0x08
  2401.  
  2402. [800,600,8,56,90]
  2403. # Unlock CRTC
  2404. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2405. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2406. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2407. # Dump CRT Controller Registers
  2408. CRT,RUN,HORZ_TOTAL,0x3b,0x31,0x31,0x00,0x34,0x1a,0x72,0xf0,0x00,0x60
  2409. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2410. CRT,RUN,VERT_RETRACE_START,0x60,0x02,0x57
  2411. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2412. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2413. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  2414. CRT,RUN,MODE_CONTROL,0x02
  2415. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2416. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  2417. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2418. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2419. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2420. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2421. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2422. # Lock CRTC Reg 11 for compatibility
  2423. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2424. # Dump ENG Register
  2425. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2426. # Dump MISCOUT Register
  2427. DIR,RUN,MISC_WRITE,0xef
  2428. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2429. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2430. CLK_IND, RUN, FREQ_2, 0x70
  2431. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2432. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2433. CRT,RUN,LATCH_DATA, 0x08
  2434.  
  2435. [800,600,8,46,75]
  2436. # Unlock CRTC
  2437. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2438. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2439. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2440. # Dump CRT Controller Registers
  2441. CRT,RUN,HORZ_TOTAL,0x3d,0x31,0x31,0x00,0x33,0x18,0x6f,0xe0,0x00,0x60
  2442. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2443. CRT,RUN,VERT_RETRACE_START,0x58,0x0b,0x57
  2444. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2445. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2446. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  2447. CRT,RUN,MODE_CONTROL,0x02
  2448. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2449. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  2450. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  2451. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2452. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2453. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2454. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2455. # Lock CRTC Reg 11 for compatibility
  2456. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2457. # Dump ENG Register
  2458. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2459. # Dump MISCOUT Register
  2460. DIR,RUN,MISC_WRITE,0xef
  2461. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2462. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2463. CLK_IND, RUN, FREQ_2, 0x60
  2464. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2465. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2466. CRT,RUN,LATCH_DATA, 0x08
  2467.  
  2468. [800,600,8,48,72]
  2469. # Unlock CRTC
  2470. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2471. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2472. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2473. # Dump CRT Controller Registers
  2474. CRT,RUN,HORZ_TOTAL,0x3c,0x31,0x31,0x00,0x35,0x1d,0x98,0xf0,0x00,0x60
  2475. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2476. CRT,RUN,VERT_RETRACE_START,0x7c,0x22,0x57
  2477. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2478. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2479. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  2480. CRT,RUN,MODE_CONTROL,0x02
  2481. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2482. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  2483. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2484. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2485. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2486. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2487. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2488. # Lock CRTC Reg 11 for compatibility
  2489. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2490. # Dump ENG Register
  2491. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2492. # Dump MISCOUT Register
  2493. DIR,RUN,MISC_WRITE,0xef
  2494. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2495. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2496. CLK_IND, RUN, FREQ_2, 0x61
  2497. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2498. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2499. CRT,RUN,LATCH_DATA, 0x08
  2500.  
  2501. [800,600,8,37,60]
  2502. # Unlock CRTC
  2503. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2504. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2505. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2506. # Dump CRT Controller Registers
  2507. CRT,RUN,HORZ_TOTAL,0x3d,0x31,0x31,0x00,0x34,0x1c,0x72,0xf0,0x00,0x60
  2508. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2509. CRT,RUN,VERT_RETRACE_START,0x58,0x0c,0x57
  2510. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2511. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2512. CRT,RUN,MISC_1,0x15,0x36,0x1e,0x11
  2513. CRT,RUN,MODE_CONTROL,0x02
  2514. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2515. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  2516. CRT,RUN,EXT_HORZ_OVERFLOW,0x08
  2517. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2518. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2519. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2520. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2521. # Lock CRTC Reg 11 for compatibility
  2522. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2523. # Dump ENG Register
  2524. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2525. # Dump MISCOUT Register
  2526. DIR,RUN,MISC_WRITE,0xef
  2527. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2528. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2529. CLK_IND, RUN, FREQ_2, 0x4D
  2530. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2531. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2532. CRT,RUN,LATCH_DATA, 0x08
  2533.  
  2534. [800,600,8,35,56]
  2535. # Unlock CRTC
  2536. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2537. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2538. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2539. # Dump CRT Controller Registers
  2540. CRT,RUN,HORZ_TOTAL,0x3b,0x31,0x31,0x00,0x33,0x18,0x6f,0xf0,0x00,0x60
  2541. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2542. CRT,RUN,VERT_RETRACE_START,0x58,0x0a,0x57
  2543. CRT,RUN,UNDERLINE_LOCATION,0x00,0x57,0x00,0xe3,0xff
  2544. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2545. CRT,RUN,MISC_1,0x15,0x34,0x1e,0x11
  2546. CRT,RUN,MODE_CONTROL,0x02
  2547. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2548. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  2549. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2550. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2551. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2552. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2553. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2554. # Lock CRTC Reg 11 for compatibility
  2555. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2556. # Dump ENG Register
  2557. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2558. # Dump MISCOUT Register
  2559. DIR,RUN,MISC_WRITE,0xef
  2560. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2561. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2562. CLK_IND, RUN, FREQ_2, 0x45
  2563. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2564. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2565. CRT,RUN,LATCH_DATA, 0x08
  2566.  
  2567. [640,480,32,64,120]
  2568. # Unlock CRTC
  2569. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2570. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2571. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2572. # Dump CRT Controller Registers
  2573. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  2574. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2575. CRT,RUN,VERT_RETRACE_START,0xef,0x0c,0xdf
  2576. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0e,0xab,0xff
  2577. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2578. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  2579. CRT,RUN,MODE_CONTROL,0x02
  2580. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2581. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  2582. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2583. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2584. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2585. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  2586. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2587. # Lock CRTC Reg 11 for compatibility
  2588. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2589. # Dump ENG Register
  2590. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2591. # Dump MISCOUT Register
  2592. DIR,RUN,MISC_WRITE,0xef
  2593. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2594. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2595. CLK_IND, RUN, FREQ_2, 0x67
  2596. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2597. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2598. CRT,RUN,LATCH_DATA, 0x00
  2599.  
  2600. [640,480,32,52,100]
  2601. # Unlock CRTC
  2602. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2603. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2604. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2605. # Dump CRT Controller Registers
  2606. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x05,0x3e,0x00,0x40
  2607. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2608. CRT,RUN,VERT_RETRACE_START,0xec,0x01,0xdf
  2609. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xff,0xab,0xff
  2610. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2611. CRT,RUN,MISC_1,0x15,0x28,0x16,0x11
  2612. CRT,RUN,MODE_CONTROL,0x02
  2613. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2614. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  2615. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2616. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2617. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2618. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  2619. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2620. # Lock CRTC Reg 11 for compatibility
  2621. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2622. # Dump ENG Register
  2623. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2624. # Dump MISCOUT Register
  2625. DIR,RUN,MISC_WRITE,0xef
  2626. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2627. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2628. CLK_IND, RUN, FREQ_2, 0x50
  2629. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2630. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2631. CRT,RUN,LATCH_DATA, 0x00
  2632.  
  2633. [640,480,32,48,90]
  2634. # Unlock CRTC
  2635. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2636. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2637. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2638. # Dump CRT Controller Registers
  2639. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  2640. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2641. CRT,RUN,VERT_RETRACE_START,0xf7,0x01,0xdf
  2642. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x12,0xab,0xff
  2643. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2644. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  2645. CRT,RUN,MODE_CONTROL,0x02
  2646. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2647. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  2648. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2649. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2650. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2651. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  2652. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2653. # Lock CRTC Reg 11 for compatibility
  2654. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2655. # Dump ENG Register
  2656. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2657. # Dump MISCOUT Register
  2658. DIR,RUN,MISC_WRITE,0xef
  2659. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2660. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2661. CLK_IND, RUN, FREQ_2, 0x4d
  2662. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2663. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2664. CRT,RUN,LATCH_DATA, 0x00
  2665.  
  2666. [640,480,32,37,75]
  2667. # Unlock CRTC
  2668. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2669. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2670. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2671. # Dump CRT Controller Registers
  2672. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0d,0xf6,0x1f,0x00,0x40
  2673. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2674. CRT,RUN,VERT_RETRACE_START,0xe0,0x03,0xdf
  2675. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xf6,0xab,0xff
  2676. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2677. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  2678. CRT,RUN,MODE_CONTROL,0x02
  2679. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2680. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  2681. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2682. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2683. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2684. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  2685. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2686. # Lock CRTC Reg 11 for compatibility
  2687. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2688. # Dump ENG Register
  2689. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2690. # Dump MISCOUT Register
  2691. DIR,RUN,MISC_WRITE,0xef
  2692. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2693. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2694. CLK_IND, RUN, FREQ_2, 0x3a
  2695. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2696. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2697. CRT,RUN,LATCH_DATA, 0x00
  2698.  
  2699. [640,480,32,37,72]
  2700. # Unlock CRTC
  2701. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2702. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2703. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2704. # Dump CRT Controller Registers
  2705. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0c,0x06,0x3e,0x00,0x40
  2706. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2707. CRT,RUN,VERT_RETRACE_START,0xe8,0x0b,0xdf
  2708. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x06,0xab,0xff
  2709. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2710. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  2711. CRT,RUN,MODE_CONTROL,0x02
  2712. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2713. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  2714. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2715. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2716. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2717. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  2718. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2719. # Lock CRTC Reg 11 for compatibility
  2720. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2721. # Dump ENG Register
  2722. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2723. # Dump MISCOUT Register
  2724. DIR,RUN,MISC_WRITE,0xef
  2725. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2726. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2727. CLK_IND, RUN, FREQ_2, 0x3a
  2728. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2729. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2730. CRT,RUN,LATCH_DATA, 0x00
  2731.  
  2732. [640,480,32,31,60]
  2733. # Unlock CRTC
  2734. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2735. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2736. CRT,RUN,REG_LOCK_1,0x48,0xA5
  2737. # Dump CRT Controller Registers
  2738. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x0b,0x3e,0x00,0x40
  2739. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2740. CRT,RUN,VERT_RETRACE_START,0xe9,0x0b,0xdf
  2741. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0b,0xab,0xff
  2742. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2743. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  2744. CRT,RUN,MODE_CONTROL,0x02
  2745. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2746. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  2747. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2748. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2749. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2750. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x01,0xae,0x00,0x00
  2751. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2752. # Lock CRTC Reg 11 for compatibility
  2753. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2754. # Dump ENG Register
  2755. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2756. # Dump MISCOUT Register
  2757. DIR,RUN,MISC_WRITE,0xef
  2758. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2759. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2760. CLK_IND, RUN, FREQ_2, 0x21
  2761. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2762. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2763. CRT,RUN,LATCH_DATA, 0x00
  2764.  
  2765. [640,480,24,64,120]
  2766. # Unlock CRTC
  2767. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2768. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2769. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2770. # Dump CRT Controller Registers
  2771. CRT,RUN,HORZ_TOTAL,0x49,0x3b,0x3c,0x8e,0x3e,0x04,0x12,0x3e,0x00,0x40
  2772. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2773. CRT,RUN,VERT_RETRACE_START,0xef,0x0c,0xdf
  2774. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0c,0xab,0xff
  2775. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2776. CRT,RUN,MISC_1,0x15,0x58,0x24,0x11
  2777. CRT,RUN,MODE_CONTROL,0x02
  2778. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2779. CRT,RUN,GENERAL_OUTPUT_PORT,0x32
  2780. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2781. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2782. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2783. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x15,0xbe,0x00,0x00
  2784. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2785. # Lock CRTC Reg 11 for compatibility
  2786. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2787. # Dump ENG Register
  2788. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2789. # Dump MISCOUT Register
  2790. DIR,RUN,MISC_WRITE,0xef
  2791. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2792. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2793. CLK_IND, RUN, FREQ_2, 0x67
  2794. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2795. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2796. CRT,RUN,LATCH_DATA, 0x00
  2797.  
  2798.  
  2799. [640,480,24,52,100]
  2800. # Unlock CRTC
  2801. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2802. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2803. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2804. # Dump CRT Controller Registers
  2805. CRT,RUN,HORZ_TOTAL,0x46,0x3b,0x3c,0x8b,0x3d,0x03,0x06,0x3e,0x00,0x40
  2806. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2807. CRT,RUN,VERT_RETRACE_START,0xec,0x01,0xdf
  2808. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x00,0xab,0xff
  2809. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2810. CRT,RUN,MISC_1,0x15,0x43,0x24,0x11
  2811. CRT,RUN,MODE_CONTROL,0x02
  2812. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2813. CRT,RUN,GENERAL_OUTPUT_PORT,0x32
  2814. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2815. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2816. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2817. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  2818. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2819. # Lock CRTC Reg 11 for compatibility
  2820. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2821. # Dump ENG Register
  2822. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2823. # Dump MISCOUT Register
  2824. DIR,RUN,MISC_WRITE,0xef
  2825. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2826. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2827. CLK_IND, RUN, FREQ_2, 0x50
  2828. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2829. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2830. CRT,RUN,LATCH_DATA, 0x00
  2831.  
  2832. [640,480,24,48,90]
  2833. # Unlock CRTC
  2834. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2835. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2836. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2837. # Dump CRT Controller Registers
  2838. CRT,RUN,HORZ_TOTAL,0x49,0x3b,0x3c,0x8e,0x3d,0x03,0x14,0x3e,0x00,0x40
  2839. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2840. CRT,RUN,VERT_RETRACE_START,0xf7,0x01,0xdf
  2841. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x12,0xab,0xff
  2842. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2843. CRT,RUN,MISC_1,0x15,0x43,0x24,0x11
  2844. CRT,RUN,MODE_CONTROL,0x02
  2845. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2846. CRT,RUN,GENERAL_OUTPUT_PORT,0x32
  2847. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2848. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2849. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2850. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  2851. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2852. # Lock CRTC Reg 11 for compatibility
  2853. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2854. # Dump ENG Register
  2855. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2856. # Dump MISCOUT Register
  2857. DIR,RUN,MISC_WRITE,0xef
  2858. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2859. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2860. CLK_IND, RUN, FREQ_2, 0x4d
  2861. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2862. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2863. CRT,RUN,LATCH_DATA, 0x00
  2864.  
  2865.  
  2866. [640,480,24,37,75]
  2867. # Unlock CRTC
  2868. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2869. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2870. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2871. # Dump CRT Controller Registers
  2872. CRT,RUN,HORZ_TOTAL,0x49,0x3b,0x3c,0x8d,0x40,0x04,0xf7,0x1f,0x00,0x40
  2873. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2874. CRT,RUN,VERT_RETRACE_START,0xe6,0x09,0xdf
  2875. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xf7,0xab,0xff
  2876. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2877. CRT,RUN,MISC_1,0x15,0x43,0x24,0x11
  2878. CRT,RUN,MODE_CONTROL,0x02
  2879. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2880. CRT,RUN,GENERAL_OUTPUT_PORT,0x32
  2881. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2882. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2883. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2884. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  2885. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2886. # Lock CRTC Reg 11 for compatibility
  2887. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2888. # Dump ENG Register
  2889. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2890. # Dump MISCOUT Register
  2891. DIR,RUN,MISC_WRITE,0xef
  2892. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2893. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2894. CLK_IND, RUN, FREQ_2, 0x3a
  2895. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2896. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2897. CRT,RUN,LATCH_DATA, 0x00
  2898.  
  2899. [640,480,24,37,72]
  2900. # Unlock CRTC
  2901. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2902. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2903. CRT,RUN,REG_LOCK_1,0x48,0xa0
  2904. # Dump CRT Controller Registers
  2905. CRT,RUN,HORZ_TOTAL,0x49,0x3b,0x3c,0x8d,0x3e,0x02,0x06,0x3e,0x00,0x40
  2906. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2907. CRT,RUN,VERT_RETRACE_START,0xe8,0x0b,0xdf
  2908. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x06,0xab,0xff
  2909. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2910. CRT,RUN,MISC_1,0x15,0x43,0x24,0x11
  2911. CRT,RUN,MODE_CONTROL,0x02
  2912. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2913. CRT,RUN,GENERAL_OUTPUT_PORT,0x32
  2914. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2915. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2916. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2917. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  2918. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2919. # Lock CRTC Reg 11 for compatibility
  2920. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2921. # Dump ENG Register
  2922. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2923. # Dump MISCOUT Register
  2924. DIR,RUN,MISC_WRITE,0xef
  2925. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2926. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2927. CLK_IND, RUN, FREQ_2, 0x3a
  2928. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2929. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2930. CRT,RUN,LATCH_DATA, 0x00
  2931.  
  2932. [640,480,24,31,60]
  2933. # Unlock CRTC
  2934. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2935. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2936. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2937. # Dump CRT Controller Registers
  2938. CRT,RUN,HORZ_TOTAL,0x46,0x3b,0x3c,0x8a,0x3d,0x06,0x0b,0x3e,0x00,0x40
  2939. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2940. CRT,RUN,VERT_RETRACE_START,0xe9,0x0b,0xdf
  2941. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0b,0xab,0xff
  2942. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x04,0x00
  2943. CRT,RUN,MISC_1,0x15,0x41,0x24,0x11
  2944. CRT,RUN,MODE_CONTROL,0x02
  2945. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2946. CRT,RUN,GENERAL_OUTPUT_PORT,0x32
  2947. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2948. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2949. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2950. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xbe,0x00,0x00
  2951. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2952. # Lock CRTC Reg 11 for compatibility
  2953. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2954. # Dump ENG Register
  2955. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2956. # Dump MISCOUT Register
  2957. DIR,RUN,MISC_WRITE,0xef
  2958. CLK_IND, RUN, MISC_CONTROL_1, 0x1
  2959. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2960. CLK_IND, RUN, FREQ_2, 0x21
  2961. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2962. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2963. CRT,RUN,LATCH_DATA, 0x00
  2964.  
  2965. [640,480,16,64,120]
  2966. # Unlock CRTC
  2967. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  2968. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  2969. CRT,RUN,REG_LOCK_1,0x48,0xa5
  2970. # Dump CRT Controller Registers
  2971. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  2972. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  2973. CRT,RUN,VERT_RETRACE_START,0xef,0x0c,0xdf
  2974. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0e,0xab,0xff
  2975. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  2976. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  2977. CRT,RUN,MODE_CONTROL,0x02
  2978. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  2979. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  2980. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  2981. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  2982. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  2983. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  2984. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  2985. # Lock CRTC Reg 11 for compatibility
  2986. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  2987. # Dump ENG Register
  2988. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  2989. # Dump MISCOUT Register
  2990. DIR,RUN,MISC_WRITE,0xef
  2991. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  2992. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  2993. CLK_IND, RUN, FREQ_2, 0x67
  2994. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  2995. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  2996. CRT,RUN,LATCH_DATA, 0x00
  2997.  
  2998. [640,480,16,52,100]
  2999. # Unlock CRTC
  3000. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3001. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3002. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3003. # Dump CRT Controller Registers
  3004. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x05,0x3e,0x00,0x40
  3005. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3006. CRT,RUN,VERT_RETRACE_START,0xec,0x01,0xdf
  3007. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xff,0xab,0xff
  3008. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3009. CRT,RUN,MISC_1,0x15,0x28,0x16,0x11
  3010. CRT,RUN,MODE_CONTROL,0x02
  3011. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3012. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  3013. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3014. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3015. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3016. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3017. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3018. # Lock CRTC Reg 11 for compatibility
  3019. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3020. # Dump ENG Register
  3021. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3022. # Dump MISCOUT Register
  3023. DIR,RUN,MISC_WRITE,0xef
  3024. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3025. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3026. CLK_IND, RUN, FREQ_2, 0x50
  3027. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3028. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3029. CRT,RUN,LATCH_DATA, 0x00
  3030.  
  3031. [640,480,16,48,90]
  3032. # Unlock CRTC
  3033. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3034. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3035. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3036. # Dump CRT Controller Registers
  3037. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  3038. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3039. CRT,RUN,VERT_RETRACE_START,0xf7,0x01,0xdf
  3040. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x12,0xab,0xff
  3041. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3042. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  3043. CRT,RUN,MODE_CONTROL,0x02
  3044. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3045. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  3046. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3047. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3048. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3049. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3050. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3051. # Lock CRTC Reg 11 for compatibility
  3052. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3053. # Dump ENG Register
  3054. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3055. # Dump MISCOUT Register
  3056. DIR,RUN,MISC_WRITE,0xef
  3057. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3058. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3059. CLK_IND, RUN, FREQ_2, 0x4d
  3060. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3061. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3062. CRT,RUN,LATCH_DATA, 0x00
  3063.  
  3064. [640,480,16,37,75]
  3065. # Unlock CRTC
  3066. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3067. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3068. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3069. # Dump CRT Controller Registers
  3070. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0d,0xf6,0x1f,0x00,0x40
  3071. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3072. CRT,RUN,VERT_RETRACE_START,0xe0,0x03,0xdf
  3073. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xf6,0xab,0xff
  3074. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3075. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  3076. CRT,RUN,MODE_CONTROL,0x02
  3077. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3078. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  3079. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3080. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3081. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3082. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3083. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3084. # Lock CRTC Reg 11 for compatibility
  3085. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3086. # Dump ENG Register
  3087. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3088. # Dump MISCOUT Register
  3089. DIR,RUN,MISC_WRITE,0xef
  3090. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3091. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3092. CLK_IND, RUN, FREQ_2, 0x3a
  3093. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3094. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3095. CRT,RUN,LATCH_DATA, 0x00
  3096.  
  3097. [640,480,16,37,72]
  3098. # Unlock CRTC
  3099. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3100. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3101. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3102. # Dump CRT Controller Registers
  3103. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0c,0x06,0x3e,0x00,0x40
  3104. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3105. CRT,RUN,VERT_RETRACE_START,0xe8,0x0b,0xdf
  3106. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x06,0xab,0xff
  3107. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3108. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  3109. CRT,RUN,MODE_CONTROL,0x02
  3110. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3111. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  3112. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3113. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3114. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3115. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3116. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3117. # Lock CRTC Reg 11 for compatibility
  3118. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3119. # Dump ENG Register
  3120. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3121. # Dump MISCOUT Register
  3122. DIR,RUN,MISC_WRITE,0xef
  3123. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3124. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3125. CLK_IND, RUN, FREQ_2, 0x3a
  3126. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3127. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3128. CRT,RUN,LATCH_DATA, 0x00
  3129.  
  3130. [640,480,16,31,60]
  3131. # Unlock CRTC
  3132. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3133. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3134. CRT,RUN,REG_LOCK_1,0x48,0xA5
  3135. # Dump CRT Controller Registers
  3136. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x0b,0x3e,0x00,0x40
  3137. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3138. CRT,RUN,VERT_RETRACE_START,0xe9,0x0b,0xdf
  3139. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0b,0xab,0xff
  3140. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3141. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  3142. CRT,RUN,MODE_CONTROL,0x02
  3143. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3144. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  3145. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3146. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3147. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3148. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3149. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3150. # Lock CRTC Reg 11 for compatibility
  3151. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3152. # Dump ENG Register
  3153. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3154. # Dump MISCOUT Register
  3155. DIR,RUN,MISC_WRITE,0xef
  3156. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3157. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3158. CLK_IND, RUN, FREQ_2, 0x21
  3159. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3160. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3161. CRT,RUN,LATCH_DATA, 0x00
  3162.  
  3163. [640,480,8,64,120]
  3164. # Unlock CRTC
  3165. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3166. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3167. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3168. # Dump CRT Controller Registers
  3169. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  3170. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3171. CRT,RUN,VERT_RETRACE_START,0xef,0x0c,0xdf
  3172. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0e,0xab,0xff
  3173. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3174. CRT,RUN,MISC_1,0x15,0x2a,0x40,0x11
  3175. CRT,RUN,MODE_CONTROL,0x02
  3176. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3177. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  3178. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3179. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3180. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3181. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3182. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3183. # Lock CRTC Reg 11 for compatibility
  3184. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3185. # Dump ENG Register
  3186. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3187. # Dump MISCOUT Register
  3188. DIR,RUN,MISC_WRITE,0xef
  3189. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3190. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3191. CLK_IND, RUN, FREQ_2, 0x67
  3192. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3193. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3194. CRT,RUN,LATCH_DATA, 0x08
  3195.  
  3196. [640,480,8,52,100]
  3197. # Unlock CRTC
  3198. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3199. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3200. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3201. # Dump CRT Controller Registers
  3202. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x05,0x3e,0x00,0x40
  3203. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3204. CRT,RUN,VERT_RETRACE_START,0xec,0x01,0xdf
  3205. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xff,0xab,0xff
  3206. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3207. CRT,RUN,MISC_1,0x15,0x28,0x40,0x11
  3208. CRT,RUN,MODE_CONTROL,0x02
  3209. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3210. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  3211. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3212. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3213. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3214. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3215. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3216. # Lock CRTC Reg 11 for compatibility
  3217. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3218. # Dump ENG Register
  3219. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3220. # Dump MISCOUT Register
  3221. DIR,RUN,MISC_WRITE,0xef
  3222. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3223. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3224. CLK_IND, RUN, FREQ_2, 0x50
  3225. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3226. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3227. CRT,RUN,LATCH_DATA, 0x08
  3228.  
  3229. [640,480,8,48,90]
  3230. # Unlock CRTC
  3231. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3232. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3233. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3234. # Dump CRT Controller Registers
  3235. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x12,0x29,0x0f,0x14,0x3e,0x00,0x40
  3236. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3237. CRT,RUN,VERT_RETRACE_START,0xf7,0x01,0xdf
  3238. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x12,0xab,0xff
  3239. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3240. CRT,RUN,MISC_1,0x15,0x2a,0x40,0x11
  3241. CRT,RUN,MODE_CONTROL,0x02
  3242. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3243. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  3244. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3245. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3246. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3247. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3248. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3249. # Lock CRTC Reg 11 for compatibility
  3250. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3251. # Dump ENG Register
  3252. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3253. # Dump MISCOUT Register
  3254. DIR,RUN,MISC_WRITE,0xef
  3255. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3256. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3257. CLK_IND, RUN, FREQ_2, 0x4d
  3258. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3259. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3260. CRT,RUN,LATCH_DATA, 0x08
  3261.  
  3262. [640,480,8,37,75]
  3263. # Unlock CRTC
  3264. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3265. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3266. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3267. # Dump CRT Controller Registers
  3268. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0d,0xf6,0x1f,0x00,0x40
  3269. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3270. CRT,RUN,VERT_RETRACE_START,0xe0,0x03,0xdf
  3271. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0xf6,0xab,0xff
  3272. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3273. CRT,RUN,MISC_1,0x15,0x2a,0x40,0x11
  3274. CRT,RUN,MODE_CONTROL,0x02
  3275. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3276. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  3277. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3278. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3279. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3280. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3281. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3282. # Lock CRTC Reg 11 for compatibility
  3283. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3284. # Dump ENG Register
  3285. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3286. # Dump MISCOUT Register
  3287. DIR,RUN,MISC_WRITE,0xef
  3288. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3289. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3290. CLK_IND, RUN, FREQ_2, 0x3a
  3291. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3292. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3293. CRT,RUN,LATCH_DATA, 0x08
  3294.  
  3295. [640,480,8,37,72]
  3296. # Unlock CRTC
  3297. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3298. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3299. CRT,RUN,REG_LOCK_1,0x48,0xa5
  3300. # Dump CRT Controller Registers
  3301. CRT,RUN,HORZ_TOTAL,0x2f,0x27,0x28,0x13,0x29,0x0c,0x06,0x3e,0x00,0x40
  3302. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3303. CRT,RUN,VERT_RETRACE_START,0xe8,0x0b,0xdf
  3304. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x06,0xab,0xff
  3305. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3306. CRT,RUN,MISC_1,0x15,0x2a,0x40,0x11
  3307. CRT,RUN,MODE_CONTROL,0x02
  3308. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3309. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  3310. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3311. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3312. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3313. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3314. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3315. # Lock CRTC Reg 11 for compatibility
  3316. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3317. # Dump ENG Register
  3318. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3319. # Dump MISCOUT Register
  3320. DIR,RUN,MISC_WRITE,0xef
  3321. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3322. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3323. CLK_IND, RUN, FREQ_2, 0x3a
  3324. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3325. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3326. CRT,RUN,LATCH_DATA, 0x08
  3327.  
  3328. [640,480,8,31,60]
  3329. # Unlock CRTC
  3330. CRT,RMW,VERT_RETRACE_END,0x7f,0x00
  3331. CRT,RMW,CRT_REG_LOCK,0xcf,0x00
  3332. CRT,RUN,REG_LOCK_1,0x48,0xA5
  3333. # Dump CRT Controller Registers
  3334. CRT,RUN,HORZ_TOTAL,0x2d,0x27,0x28,0x10,0x29,0x0f,0x0b,0x3e,0x00,0x40
  3335. CRT,RUN,START_ADDRESS_HIGH,0x00,0x00
  3336. CRT,RUN,VERT_RETRACE_START,0xe9,0x0b,0xdf
  3337. CRT,RUN,UNDERLINE_LOCATION,0x60,0xe7,0x0b,0xab,0xff
  3338. CRT,RUN,BACKWARD_COMP_1,0x00,0x20,0x00,0x00
  3339. CRT,RUN,MISC_1,0x15,0x2a,0x16,0x11
  3340. CRT,RUN,MODE_CONTROL,0x02
  3341. CRT,RUN,EXT_MEM_CONTROL_1,0x18,0x38,0x00,0x00,0x00
  3342. CRT,RUN,GENERAL_OUTPUT_PORT,0x02
  3343. CRT,RUN,EXT_HORZ_OVERFLOW,0x00
  3344. CRT,RUN,EXT_VERT_OVERFLOW,0x40
  3345. CRT,RUN,EXT_MEM_CONTROL_3,0x14,0x80,0xa1,0x00
  3346. CRT,RUN,EXT_MISC_CONTROL,0x00,0x00,0x11,0xae,0x00,0x00
  3347. CRT,RUN,EXT_MISC_CONTROL_3,0x00
  3348. # Lock CRTC Reg 11 for compatibility
  3349. CRT,RMW,VERT_RETRACE_END,0x7f,0x80
  3350. # Dump ENG Register
  3351. ENG,RUN,ADV_FUNCTION_CONTROL,0x01
  3352. # Dump MISCOUT Register
  3353. DIR,RUN,MISC_WRITE,0xef
  3354. CLK_IND, RUN, MISC_CONTROL_1, 0x01
  3355. CLK_IND, RUN, MISC_CONTROL_2, 0x43
  3356. CLK_IND, RUN, FREQ_2, 0x21
  3357. CLK_IND, RUN, MISC_CLOCK_CONTROL, 0x01
  3358. CLK_IND, RUN, FIXED_PLL_REFDIV, 0x07
  3359. CRT,RUN,LATCH_DATA, 0x08
  3360.  
  3361.  
  3362.  
  3363.  
  3364.  
  3365.  
  3366.